>> I just removed the code to examine-and-reenable SR_INT_IE bit in
>> syscall().  The bit was turned on when system call exception is
>> received.  I believe in MIPS3 can run harmlessly, but would like to
>> know whether that really makes no trouble. I checked the new with
>> R3000A.
>
> I will try and let you know.
>
> For syscalls, where do interrupts get re-enabled now?

Inside locore_mips{1,3}.S assembler hooks.

- When MIPS1 processor receives system call exeception, IEc has 0 while
  IEp does 1.  SystemCall assembler hook enables IEc (== SR_INT_IE) on
  prior to call syscall() kernel entry point. (a change in 1.43)

- When MIPS3 receives system call exception, EXL has 1 to prevent
  interrupts while SR_INT_IE remains 1.  Clearing EXL makes interrupt
  re-enable effect.

The "examine-and-reenable" sequence was copied irrelvantly when
syscall() processing was separated from trap().

Eventually, remaining SR_INT_IE arrangement will be moved away to
locore_mips{1,3}.S, and completely invisible from C code path. 

Tohru Nishimura