Subject: Re: Support for MIPS32 and MIPS64 CPUs.
To: enami tsugutomo <enami@but-b.or.jp>
From: Simon Burge <simonb@wasabisystems.com>
List: port-mips
Date: 02/26/2002 22:57:07
enami tsugutomo wrote:
> > @@ -133,7 +123,8 @@ MachEmulateLWC1(inst, frame, cause)
> > if (mips_btop(frame->f_regs[PC]) != mips_btop(pc))
> > return;
> >
> > - inst = fuiword((u_int32_t *)frame->f_regs[PC]);
> > + vaddr = frame->f_regs[PC]; /* XXX truncates to 32 bits */
> > + inst = fuiword(&vaddr);
>
> I guess you are passing wrong value to fuiword() now.
Indeed! It's interesting to note that I have seen what appears to be
funny behaviour with FP code (both of the boards running this code use
the kernel FP emulator). Perhaps lwc1/swc1 aren't used that much...
I've changed both of these to
- inst = fuiword((u_int32_t *)frame->f_regs[PC]);
+ vaddr = frame->f_regs[PC]; /* XXX truncates to 32 bits */
+ inst = fuiword((u_int32_t *)vaddr);
Thanks!
Simon.
--
Simon Burge <simonb@wasabisystems.com>
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