Subject: Re: CPU dependent code for VR41xx and TX39xx
To: None <locore32@gaea.ocn.ne.jp>
From: TAKEMURA Shin Takemura <takemura@ca2.so-net.ne.jp>
List: port-mips
Date: 05/04/2003 23:12:50
Hi,
I agree that we should have arch/mips/vr41xx and tx39xx.
From: "Toru Nishimura" <locore32@gaea.ocn.ne.jp>
Subject: Re: CPU dependent code for VR41xx and TX39xx
Date: Fri, 2 May 2003 16:19:00 +0900
> The worst is a dogmatic
> use of bus_space, which contribute to nothing. It'd make no sense to
> move to 'shared' arena in that design.
It isn't my own idea. I had discussion for the issue in the tech-kern ML.
Please refer ML archives,
Subject: 16bit aligned NS16550 variant
http://mail-index.netbsd.org/tech-kern/2001/10/
Subject: MI bus ops(Re: 16bit aligned NS16550 variant)
http://mail-index.netbsd.org/tech-kern/2001/11/
While noone objected my plan, I didn't commit the MI bus.h
because I didn't have time and guts to do that.
TAKEMURA