Subject: Re: new R10000 cache op implementation
To: Takao Shinohara <shin@sm.sony.co.jp>
From: Simon Burge <simonb@wasabisystems.com>
List: port-mips
Date: 10/26/2003 00:24:54
Takao Shinohara wrote:
> Simon Burge <simonb@wasabisystems.com> writes:
> > What exactly is broken with the current R10k implementation?
>
> How to index 2-way cache was fundamentally broken in rev. 1.1.
>
> R10000/12000/14000 uses VA0 to select way 0 or 1, but in rev. 1.1, VA13
> was used.
>
> [ more deleted ]
Cool!
Thanks for the info.
Simon.
--
Simon Burge <simonb@wasabisystems.com>
NetBSD Support and Service: http://www.wasabisystems.com/