>> VMS was never ever going to run on MIPS so it wasn't added for
>> that reason.
> and DEC decided to do its own internal CPU development, 
> which became Alpha.

A VMS architect was leaving/has left DEC at the time when R4000
was being designed.

On the other hand, it's obvious DEC prompted MIPS processor to
have little-endian.  The 32bit clean RISC design allowed to have
bi-endianness with little burden, which is one of modern processor
features.  Too bad RE bit was never been useful for any purpose.

Another mystery I have is the introduction of EXL bit.  It brings substantial
differences in exception processing path.   There was an implementation
m-i-s-t-a-k-e which prevents atomic mode switch from using a single
CP0 insn.   The insn count to divert from exception was worse than
R3000. 

Toru Nishimura/ALKYL Technology