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some mips changes for loongson2
Hello,
I've been working on getting NetBSD running on a loongson2f-based
mini-PC (lemote fuulong). There's already ls2f support for gdium but it's
not complete (for example, it doesn't support 64bits, nor the ISA devices
found on lemote hardware).
Here's a first round of patches, which do 2 things:
- LS2f doens't have separate vector address for tlb_miss and xtlb_miss
exeptions, the tlb_miss handler address is used for both (and the
vector can be twice as large as the xtlb_miss space is free for use).
mips.diff contains a patch for this, where the ls2f tlb_miss
checks if the fault address is in useg or xuseg and takes appropriate
action.
- ls2f CPUs have a hardware bug which can make them hang on a jump register
in kernel mode. A workaround can be implemented in binutils which adds
2 instructions using the at register before each j(r) ra.
(right now I'm using a OpenBSD patch which does:
li at,3
dmtc0 at, $22
to clear the branch prediction logic before any jump register. Our binutils
have something sighly different, I've yet to look at it to see if it's
useable for us - in any case that's a different topic).
This workaround requires the use of at register before jump register,
so I patched the assembly in arch/mips and common/ to allow at use before
jump so that the assembler can install the workaroud.
Any comment about these 2 patches ?
--
Manuel Bouyer <bouyer%antioche.eu.org@localhost>
NetBSD: 26 ans d'experience feront toujours la difference
--
Index: mips/lock_stubs_ras.S
===================================================================
RCS file: /cvsroot/src/sys/arch/mips/mips/lock_stubs_ras.S,v
retrieving revision 1.3
diff -u -p -u -r1.3 lock_stubs_ras.S
--- mips/lock_stubs_ras.S 29 Apr 2011 22:04:42 -0000 1.3
+++ mips/lock_stubs_ras.S 10 Aug 2011 10:14:12 -0000
@@ -81,6 +81,20 @@
.set noat
/*
+ * to work around the branch prediction engine misbehavior of
+ * Loongson 2F processors we need to clear the BTB before a j ra.
+ * This requires extra instructions which don't fit in the RAS blocks,
+ * so do a PC-relative just to a block of code (this is the same size as
+ * a j ra) where we can let the assembler install the workaround.
+ */
+#ifdef MIPS3_LOONGSON2F
+#define RETURN j loongson_return
+#else
+#define RETURN j ra
+#endif
+
+
+/*
* unsigned long ras_atomic_cas_ulong(volatile unsigned long *val,
* unsigned long old, unsigned long new);
*/
@@ -89,7 +103,7 @@
EXPORT(_lock_ras_start)
STATIC_LEAF(ras_atomic_cas_noupdate)
- j ra
+ RETURN
move v0, t0
END(ras_atomic_cas_noupdate)
@@ -105,7 +119,7 @@ _atomic_cas_ulong_ras_start:
nop
PTR_S a2, (a0) /* <- critical section end */
_atomic_cas_ulong_ras_end:
- j ra
+ RETURN
move v0, a1
END(ras_atomic_cas_ulong)
@@ -125,7 +139,7 @@ _atomic_cas_uint_ras_start:
nop
INT_S a2, (a0) /* <- critical section end */
_atomic_cas_uint_ras_end:
- j ra
+ RETURN
move v0, a1
END(ras_atomic_cas_uint)
@@ -146,7 +160,7 @@ _ucas_ulong_ras_start:
LONG_S a2, (a0) /* <- critical section end */
_ucas_ulong_ras_end:
PTR_S zero, PCB_ONFAULT(v1)
- j ra
+ RETURN
LONG_S t0, 0(a3)
END(_ucas_ulong_ras)
@@ -165,7 +179,7 @@ _ucas_uint_ras_start:
INT_S a2, (a0) /* <- critical section end */
_ucas_uint_ras_end:
PTR_S zero, PCB_ONFAULT(v1)
- j ra
+ RETURN
INT_S t0, 0(a3)
END(_ucas_uint_ras)
@@ -184,7 +198,7 @@ _mutex_enter_ras_start:
nop
PTR_S MIPS_CURLWP, (a0)/* <- critical section end */
_mutex_enter_ras_end:
- j ra
+ RETURN
nop
END(ras_mutex_enter)
@@ -203,7 +217,7 @@ _mutex_exit_ras_start:
nop
PTR_S zero, (a0) /* <- critical section end */
_mutex_exit_ras_exit:
- j ra
+ RETURN
nop
END(ras_mutex_exit)
@@ -223,6 +237,13 @@ END(ras_mutex_vector_exit)
.p2align LOG2_MIPS_LOCK_RAS_SIZE /* Get out of the RAS block */
+ .set at
+#ifdef MIPS3_LOONGSON2F
+loongson_return:
+ j ra
+ nop
+#endif
+
/*
* Patch up the given address. We arrive here if we might have trapped
* within one of the critical sections above. Do:
Index: mips/mipsX_subr.S
===================================================================
RCS file: /cvsroot/src/sys/arch/mips/mips/mipsX_subr.S,v
retrieving revision 1.52
diff -u -p -u -r1.52 mipsX_subr.S
--- mips/mipsX_subr.S 2 Aug 2011 05:13:21 -0000 1.52
+++ mips/mipsX_subr.S 10 Aug 2011 10:14:12 -0000
@@ -330,8 +330,54 @@
*
* Don't check for invalid pte's here. We load them as well and
* let the processor trap to load the correct value after service.
+ *
+ * Loongson2 processors don't have separate tlbmiss and xtlbmiss handlers;
+ * so we have to check for useg addresses in tlb_miss. The good news is that
+ * we can use 64 intructions form tlbmiss instead of 32.
+ *
*----------------------------------------------------------------------------
*/
+#ifdef MIPS3_LOONGSON2
+/* this loongson2-specific part is almost a copy of xtlb_miss */
+VECTOR(MIPSX(tlb_miss), unknown)
+ .set noat
+ dmfc0 k0, MIPS_COP_0_BAD_VADDR #00: k0=bad address
+#ifdef _LP64
+ nop #01: nop
+ bltz k0, MIPSX(kernelfault) #02: k0<0 -> kernel fault
+ PTR_SRL k1, k0, 31 #03: clear useg bits
+ beqz k1, 1f #04: k1==0 -> useg address
+ PTR_SRL k1,k0,2*(PGSHIFT-PTR_SCALESHIFT)+(PGSHIFT-2)+PGSHIFT #05:
clear valid bits
+ bnez k1, MIPSX(nopagetable) #06: not legal address
+ PTR_SRL k0, 2*(PGSHIFT-PTR_SCALESHIFT)+(PGSHIFT-2) #05: k0=seg offset
(almost)
+ lui k1, %hi(CPUVAR(PMAP_SEGTAB)) #07: k1=hi of segtab
+ andi k0, NBPG-(1<<PTR_SCALESHIFT) #08: k0=seg offset (mask 0x3)
+ PTR_L k1, %lo(CPUVAR(PMAP_SEGTAB))(k1)#09: k1=segment tab
+ PTR_ADDU k1, k0 #0a: k1=seg entry address
+ dmfc0 k0, MIPS_COP_0_BAD_VADDR #0b: k0=bad address (again)
+ PTR_L k1, 0(k1) #0c: k1=seg entry
+ b MIPSX(tlb_miss_common) #0d
+ PTR_SRL k0, 1*(PGSHIFT-PTR_SCALESHIFT)+(PGSHIFT-2) #0e: k0=seg offset
(almost)
+#endif /* LP64 */
+1: /* handle useg addresses */
+ lui k1, %hi(CPUVAR(PMAP_SEG0TAB)) #0f: k1=hi of seg0tab
+ bltz k0, MIPSX(kernelfault) #10: k0<0 -> kernel fault
+ dsrl k0, 31 #11: clear low 31 bits
+ bnez k0, MIPSX(nopagetable) #12: not legal address
+ PTR_L k1, %lo(CPUVAR(PMAP_SEG0TAB))(k1)#13: k1=segment tab base
+ dmfc0 k0, MIPS_COP_0_BAD_VADDR #14: k0=bad address (again)
+ nop #15
+ b MIPSX(tlb_miss_common) #16
+ PTR_SRL k0, 1*(PGSHIFT-PTR_SCALESHIFT)+(PGSHIFT-2) #17: k0=seg offset
(almost)
+_VECTOR_END(MIPSX(tlb_miss))
+/* dummy xtlb_miss (also a placeholder for tlb_miss_common) */
+VECTOR(MIPSX(xtlb_miss), unknown)
+ lui k0, %hi(_C_LABEL(panic)) #00
+ addiu k0, %lo(_C_LABEL(panic)) #01
+ lui a0, %hi(loongson2_xtlb_miss_str) #02
+ jr k0 #03
+ addiu a0, %lo(loongson2_xtlb_miss_str) #04
+#else /* MIPS3_LOONGSON2 */
VECTOR(MIPSX(tlb_miss), unknown)
.set noat
_MFC0 k0, MIPS_COP_0_BAD_VADDR #00: k0=bad address
@@ -339,6 +385,7 @@ VECTOR(MIPSX(tlb_miss), unknown)
bltz k0, MIPSX(kernelfault) #02: k0<0 -> 4f (kernel fault)
PTR_SRL k0, 1*(PGSHIFT-PTR_SCALESHIFT)+(PGSHIFT-2)#03: k0=seg offset
(almost)
PTR_L k1, %lo(CPUVAR(PMAP_SEG0TAB))(k1)#04: k1=seg0tab
+#endif /* MIPS3_LOONGSON2 */
MIPSX(tlb_miss_common):
#ifdef _LP64
beqz k1, MIPSX(nopagetable) #05: is there a pagetable?
@@ -374,8 +421,13 @@ MIPSX(tlb_miss_common):
#endif
eret #1f: return from exception
.set at
+#ifdef MIPS3_LOONGSON2
+_VECTOR_END(MIPSX(xtlb_miss))
+#else
_VECTOR_END(MIPSX(tlb_miss))
+#endif
+#ifndef MIPS3_LOONGSON2
#if defined(USE_64BIT_CP0_FUNCTIONS)
/*
* mipsN_xtlb_miss routine
@@ -391,9 +443,18 @@ _VECTOR_END(MIPSX(tlb_miss))
*
* Don't check for invalid pte's here. We load them as well and
* let the processor trap to load the correct value after service.
+ *
+ * Loongson2 CPUs don't have separate tlbmiss and xtlbmiss, so we have
+ * to check the address size here and branch to tlb_miss if needed.
*/
VECTOR(MIPSX(xtlb_miss), unknown)
.set noat
+ lui k1, %hi(_C_LABEL(xtlb_miss))
+ addiu k1, %lo(_C_LABEL(xtlb_miss))
+ INT_L k0, 0(k1)
+ INT_ADDU k0, 1
+ INT_S k0, 0(k1)
+
dmfc0 k0, MIPS_COP_0_BAD_VADDR #00: k0=bad address
#ifdef _LP64
nop #01: nop
@@ -423,6 +484,7 @@ _VECTOR_END(MIPSX(xtlb_miss))
#else
.space 128
#endif /* USE_64BIT_CP0_FUNCTIONS */
+#endif /* !MIPS3_LOONGSON2 */
/*
* Vector to real handler in KSEG1.
@@ -1421,6 +1483,7 @@ NESTED_NOPROFILE(MIPSX(systemcall), CALL
/*
* Call the system call handler.
*/
+ .set at
jalr t9
move a0, MIPS_CURLWP # 1st arg is curlwp
@@ -1436,7 +1499,6 @@ NESTED_NOPROFILE(MIPSX(systemcall), CALL
lui ra, %hi(MIPSX(user_return)) # return directly to user return
j _C_LABEL(ast)
PTR_ADDIU ra, %lo(MIPSX(user_return)) # return directly to user return
- .set at
END(MIPSX(systemcall))
/*
@@ -1706,6 +1768,8 @@ END(MIPSX(tlb_invalid_exception))
.globl _C_LABEL(MIPSX(exceptionentry_end))
_C_LABEL(MIPSX(exceptionentry_end)):
+ .set at
+
/*--------------------------------------------------------------------------
*
* mipsN_tlb_set_asid --
@@ -1774,8 +1838,8 @@ LEAF(MIPSX(tlb_update))
tlbwi # update slot found
COP0_SYNC
#ifdef MIPS3_LOONGSON2
- li k0, MIPS_DIAG_ITLB_CLEAR
- mtc0 v0, MIPS_COP_0_DIAG # invalidate ITLB
+ li t1, MIPS_DIAG_ITLB_CLEAR
+ mtc0 t1, MIPS_COP_0_DIAG # invalidate ITLB
#elif defined(MIPS3)
nop # required for QED5230
nop # required for QED5230
@@ -1796,8 +1860,8 @@ LEAF(MIPSX(tlb_update))
tlbwi # update slot found
COP0_SYNC
#ifdef MIPS3_LOONGSON2
- li k0, MIPS_DIAG_ITLB_CLEAR
- mtc0 v0, MIPS_COP_0_DIAG # invalidate ITLB
+ li t1, MIPS_DIAG_ITLB_CLEAR
+ mtc0 t1, MIPS_COP_0_DIAG # invalidate ITLB
#elif defined(MIPS3)
nop # required for QED5230
nop # required for QED5230
@@ -1917,7 +1981,7 @@ LEAF_NOPROFILE(MIPSX(tlb_invalidate_addr
tlbwi
COP0_SYNC
#ifdef MIPS3_LOONGSON2
- li k0, MIPS_DIAG_ITLB_CLEAR
+ li v0, MIPS_DIAG_ITLB_CLEAR
mtc0 v0, MIPS_COP_0_DIAG # invalidate ITLB
#elif defined(MIPS3)
nop
@@ -1987,7 +2051,7 @@ LEAF_NOPROFILE(MIPSX(tlb_invalidate_asid
COP0_SYNC
#ifdef MIPS3_LOONGSON2
- li k0, MIPS_DIAG_ITLB_CLEAR
+ li v0, MIPS_DIAG_ITLB_CLEAR
mtc0 v0, MIPS_COP_0_DIAG # invalidate ITLB
#endif
@@ -2042,7 +2106,7 @@ LEAF_NOPROFILE(MIPSX(tlb_invalidate_glob
COP0_SYNC
#ifdef MIPS3_LOONGSON2
- li k0, MIPS_DIAG_ITLB_CLEAR
+ li v0, MIPS_DIAG_ITLB_CLEAR
mtc0 v0, MIPS_COP_0_DIAG # invalidate ITLB
#endif
@@ -2090,7 +2154,7 @@ LEAF_NOPROFILE(MIPSX(tlb_invalidate_all)
COP0_SYNC
#ifdef MIPS3_LOONGSON2
- li k0, MIPS_DIAG_ITLB_CLEAR
+ li v0, MIPS_DIAG_ITLB_CLEAR
mtc0 v0, MIPS_COP_0_DIAG # invalidate ITLB
#endif
@@ -2251,14 +2315,12 @@ LEAF(MIPSX(tlb_enter))
COP0_SYNC
_MTC0 ta1, MIPS_COP_0_TLB_HI # restore EntryHi
-
#ifdef MIPS3_LOONGSON2
- li k0, MIPS_DIAG_ITLB_CLEAR
+ li v0, MIPS_DIAG_ITLB_CLEAR
mtc0 v0, MIPS_COP_0_DIAG # invalidate ITLB
#endif
-
- JR_HB_RA
.set at
+ JR_HB_RA
END(MIPSX(tlb_enter))
/*
@@ -2487,7 +2549,7 @@ LEAF(MIPSX(tlb_write_indexed))
COP0_SYNC
#ifdef MIPS3_LOONGSON2
- li k0, MIPS_DIAG_ITLB_CLEAR
+ li v0, MIPS_DIAG_ITLB_CLEAR
mtc0 v0, MIPS_COP_0_DIAG # invalidate ITLB
#endif
@@ -2524,12 +2586,12 @@ LEAF_NOPROFILE(MIPSX(VCED))
cache (CACHE_R4K_D | CACHEOP_R4K_HIT_INV), 0(k0)
#ifdef DEBUG
_MFC0 k0, MIPS_COP_0_BAD_VADDR
- PTR_LA k1, VCED_vaddr
+ PTR_LA k1, MIPSX(VCED_vaddr)
PTR_S k0, 0(k1)
_MFC0 k0, MIPS_COP_0_EXC_PC
- PTR_LA k1, VCED_epc
+ PTR_LA k1, MIPSX(VCED_epc)
PTR_S k0, 0(k1)
- PTR_LA k1, VCED_count # count number of exceptions
+ PTR_LA k1, MIPSX(VCED_count) # count number of exceptions
PTR_SRL k0, k0, 26 # position upper 4 bits of VA
and k0, k0, 0x3c # mask it off
PTR_ADDU k1, k0 # get address of count table
@@ -2542,14 +2604,14 @@ LEAF_NOPROFILE(MIPSX(VCED))
#ifdef DEBUG
.data
- .globl _C_LABEL(VCED_count)
-_C_LABEL(VCED_count):
+ .globl _C_LABEL(MIPSX(VCED_count))
+_C_LABEL(MIPSX(VCED_count)):
LONG_WORD 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
- .globl _C_LABEL(VCED_epc)
-_C_LABEL(VCED_epc):
+ .globl _C_LABEL(MIPSX(VCED_epc))
+_C_LABEL(MIPSX(VCED_epc)):
PTR_WORD 0
- .globl _C_LABEL(VCED_vaddr)
-_C_LABEL(VCED_vaddr):
+ .globl _C_LABEL(MIPSX(VCED_vaddr))
+_C_LABEL(MIPSX(VCED_vaddr)):
PTR_WORD 0
.text
#endif
@@ -2562,9 +2624,9 @@ LEAF_NOPROFILE(MIPSX(VCEI))
cache (CACHE_R4K_I | CACHEOP_R4K_HIT_INV), 0(k0)
#ifdef DEBUG
_MFC0 k0, MIPS_COP_0_BAD_VADDR
- PTR_LA k1, VCEI_vaddr
+ PTR_LA k1, MIPSX(VCEI_vaddr)
PTR_S k0, 0(k1)
- PTR_LA k1, VCEI_count # count number of exceptions
+ PTR_LA k1, MIPSX(VCEI_count) # count number of exceptions
PTR_SRL k0, k0, 26 # position upper 4 bits of VA
and k0, k0, 0x3c # mask it off
PTR_ADDU k1, k0 # get address of count table
@@ -2577,11 +2639,11 @@ LEAF_NOPROFILE(MIPSX(VCEI))
#ifdef DEBUG
.data
- .globl _C_LABEL(VCEI_count)
-_C_LABEL(VCEI_count):
+ .globl _C_LABEL(MIPSX(VCEI_count))
+_C_LABEL(MIPSX(VCEI_count)):
LONG_WORD 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
- .globl _C_LABEL(VCEI_vaddr)
-_C_LABEL(VCEI_vaddr):
+ .globl _C_LABEL(MIPSX(VCEI_vaddr))
+_C_LABEL(MIPSX(VCEI_vaddr)):
PTR_WORD 0
.text
#endif
@@ -2725,3 +2787,7 @@ MIPSX(excpt_sw):
#else
PTR_WORD _C_LABEL(MIPSX(user_gen_exception)) # 31
#endif
+#ifdef MIPS3_LOONGSON2
+loongson2_xtlb_miss_str:
+ .string "loongson2_xtlb_miss"
+#endif
Index: mips/mips_fixup.c
===================================================================
RCS file: /cvsroot/src/sys/arch/mips/mips/mips_fixup.c,v
retrieving revision 1.6
diff -u -p -u -r1.6 mips_fixup.c
--- mips/mips_fixup.c 29 Apr 2011 22:17:17 -0000 1.6
+++ mips/mips_fixup.c 10 Aug 2011 10:14:12 -0000
@@ -270,6 +270,10 @@ mips_fixup_stubs(uint32_t *start, uint32
* [nop]
* jr t9
* nop
+ * on loongson2f, a
+ * li at, 0x3
+ * dmtc0 at, $22
+ * is inserted before the jr t9
*/
const uint32_t lui_insn = stubp[0];
const uint32_t load_insn = stubp[1];
@@ -277,9 +281,13 @@ mips_fixup_stubs(uint32_t *start, uint32
if (stubp[2] == 0) {
KASSERT(stubp[3] == 0x03200008); /* jr t9 */
KASSERT(stubp[4] == 0); /* nop */
- } else {
- KASSERT(stubp[2] == 0x03200008); /* jr t9 */
+ } else if (stubp[2] == 0x03200008) { /* jr t9 */
KASSERT(stubp[3] == 0); /* nop */
+ } else {
+ KASSERT(stubp[2] == 0x34010003); /* li at,3 */
+ KASSERT(stubp[3] == 0x40a1b000); /* dmtc0 at,
$22*/
+ KASSERT(stubp[4] == 0x03200008); /* jr t9 */
+ KASSERT(stubp[5] == 0); /* nop */
}
KASSERT(INSN_LUI_P(lui_insn));
Index: lib/libc/arch/mips/atomic/atomic_add.S
===================================================================
RCS file: /cvsroot/src/common/lib/libc/arch/mips/atomic/atomic_add.S,v
retrieving revision 1.2
diff -u -p -u -r1.2 atomic_add.S
--- lib/libc/arch/mips/atomic/atomic_add.S 14 Dec 2009 00:38:59 -0000
1.2
+++ lib/libc/arch/mips/atomic/atomic_add.S 10 Aug 2011 10:17:52 -0000
@@ -30,12 +30,22 @@
#include <machine/asm.h>
#include "atomic_op_asm.h"
+
RCSID("$NetBSD: atomic_add.S,v 1.2 2009/12/14 00:38:59 matt Exp $")
.text
- .set noat
.set noreorder
+#ifdef _KERNEL_OPT
+#include "opt_cputype.h"
+#ifndef MIPS3_LOONGSON2F
+ .set noat
.set nomacro
+#endif
+#else /* _KERNEL_OPT */
+ .set noat
+ .set nomacro
+#endif /* _KERNEL_OPT */
+
LEAF(_atomic_add_32)
1: INT_LL t0, 0(a0)
Index: lib/libc/arch/mips/atomic/atomic_and.S
===================================================================
RCS file: /cvsroot/src/common/lib/libc/arch/mips/atomic/atomic_and.S,v
retrieving revision 1.2
diff -u -p -u -r1.2 atomic_and.S
--- lib/libc/arch/mips/atomic/atomic_and.S 14 Dec 2009 00:38:59 -0000
1.2
+++ lib/libc/arch/mips/atomic/atomic_and.S 10 Aug 2011 10:17:52 -0000
@@ -33,9 +33,18 @@
RCSID("$NetBSD: atomic_and.S,v 1.2 2009/12/14 00:38:59 matt Exp $")
.text
- .set noat
.set noreorder
+#ifdef _KERNEL_OPT
+#include "opt_cputype.h"
+#ifndef MIPS3_LOONGSON2F
+ .set noat
+ .set nomacro
+#endif
+#else /* _KERNEL_OPT */
+ .set noat
.set nomacro
+#endif /* _KERNEL_OPT */
+
LEAF(_atomic_and_32)
1: INT_LL t0, 0(a0)
Index: lib/libc/arch/mips/atomic/atomic_dec.S
===================================================================
RCS file: /cvsroot/src/common/lib/libc/arch/mips/atomic/atomic_dec.S,v
retrieving revision 1.2
diff -u -p -u -r1.2 atomic_dec.S
--- lib/libc/arch/mips/atomic/atomic_dec.S 14 Dec 2009 00:39:00 -0000
1.2
+++ lib/libc/arch/mips/atomic/atomic_dec.S 10 Aug 2011 10:17:52 -0000
@@ -33,9 +33,17 @@
RCSID("$NetBSD: atomic_dec.S,v 1.2 2009/12/14 00:39:00 matt Exp $")
.text
- .set noat
.set noreorder
+#ifdef _KERNEL_OPT
+#include "opt_cputype.h"
+#ifndef MIPS3_LOONGSON2F
+ .set noat
+ .set nomacro
+#endif
+#else /* _KERNEL_OPT */
+ .set noat
.set nomacro
+#endif /* _KERNEL_OPT */
LEAF(_atomic_dec_32)
1: INT_LL t0, 0(a0)
Index: lib/libc/arch/mips/atomic/atomic_inc.S
===================================================================
RCS file: /cvsroot/src/common/lib/libc/arch/mips/atomic/atomic_inc.S,v
retrieving revision 1.2
diff -u -p -u -r1.2 atomic_inc.S
--- lib/libc/arch/mips/atomic/atomic_inc.S 14 Dec 2009 00:39:00 -0000
1.2
+++ lib/libc/arch/mips/atomic/atomic_inc.S 10 Aug 2011 10:17:52 -0000
@@ -33,9 +33,18 @@
RCSID("$NetBSD: atomic_inc.S,v 1.2 2009/12/14 00:39:00 matt Exp $")
.text
- .set noat
.set noreorder
+#ifdef _KERNEL_OPT
+#include "opt_cputype.h"
+#ifndef MIPS3_LOONGSON2F
+ .set noat
+ .set nomacro
+#endif
+#else /* _KERNEL_OPT */
+ .set noat
.set nomacro
+#endif /* _KERNEL_OPT */
+
LEAF(_atomic_inc_32)
1: INT_LL t0, 0(a0)
Index: lib/libc/arch/mips/atomic/atomic_or.S
===================================================================
RCS file: /cvsroot/src/common/lib/libc/arch/mips/atomic/atomic_or.S,v
retrieving revision 1.2
diff -u -p -u -r1.2 atomic_or.S
--- lib/libc/arch/mips/atomic/atomic_or.S 14 Dec 2009 00:39:00 -0000
1.2
+++ lib/libc/arch/mips/atomic/atomic_or.S 10 Aug 2011 10:17:52 -0000
@@ -31,9 +31,17 @@
#include "atomic_op_asm.h"
.text
- .set noat
.set noreorder
+#ifdef _KERNEL_OPT
+#include "opt_cputype.h"
+#ifndef MIPS3_LOONGSON2F
+ .set noat
+ .set nomacro
+#endif
+#else /* _KERNEL_OPT */
+ .set noat
.set nomacro
+#endif /* _KERNEL_OPT */
LEAF(_atomic_or_32)
1: INT_LL t0, 0(a0)
Index: lib/libc/arch/mips/atomic/atomic_swap.S
===================================================================
RCS file: /cvsroot/src/common/lib/libc/arch/mips/atomic/atomic_swap.S,v
retrieving revision 1.2
diff -u -p -u -r1.2 atomic_swap.S
--- lib/libc/arch/mips/atomic/atomic_swap.S 14 Dec 2009 00:39:00 -0000
1.2
+++ lib/libc/arch/mips/atomic/atomic_swap.S 10 Aug 2011 10:17:52 -0000
@@ -33,9 +33,18 @@
RCSID("$NetBSD: atomic_swap.S,v 1.2 2009/12/14 00:39:00 matt Exp $")
.text
- .set noat
.set noreorder
+#ifdef _KERNEL_OPT
+#include "opt_cputype.h"
+#ifndef MIPS3_LOONGSON2F
+ .set noat
+ .set nomacro
+#endif
+#else /* _KERNEL_OPT */
+ .set noat
.set nomacro
+#endif /* _KERNEL_OPT */
+
LEAF(_atomic_swap_32)
1: INT_LL v0, 0(a0)
Index: lib/libc/arch/mips/string/bcopy.S
===================================================================
RCS file: /cvsroot/src/common/lib/libc/arch/mips/string/bcopy.S,v
retrieving revision 1.3
diff -u -p -u -r1.3 bcopy.S
--- lib/libc/arch/mips/string/bcopy.S 14 Dec 2009 00:39:00 -0000 1.3
+++ lib/libc/arch/mips/string/bcopy.S 10 Aug 2011 10:17:53 -0000
@@ -170,8 +170,10 @@ LEAF(FUNCTION)
PTR_ADDU DSTREG,1
4: # copydone
+ .set at #-mfix-loongson2f-btb
j ra
nop
+ .set noat
/*
* Copy from unaligned source to aligned dest.
@@ -264,8 +266,10 @@ LEAF(FUNCTION)
PTR_SUBU DSTREG,1
4: # copydone
+ .set at #-mfix-loongson2f-btb
j ra
nop
+ .set noat
/*
* Copy from unaligned source to aligned dest.
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