Port-mips archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
Clean up Cavium Octeon device names
Hi folks,
I'd like to commit the attached patch which cleans up the Cavium Octeon
device names. The current names (octeon_foo) are a bit unpleasant to
the eye and don't follow the naming conventions used by many other MIPS
CPUs.
Attached is the patch, and a full dmesg before and after. Note that
the patch doesn't change any internal structs, function or other names.
I'll change these over time but wanted to get this cleanup done first.
Here is a diff between the before and after dmesg:
--- dmesg-before 2020-05-25 15:47:44.029751584 +1000
+++ dmesg-after 2020-05-25 15:52:52.638070773 +1000
@@ -5,7 +5,7 @@
Copyright (c) 1982, 1986, 1989, 1991, 1993
The Regents of the University of California. All rights reserved.
-NetBSD 9.99.64 (ERLITE) #0: Mon May 25 15:44:31 AEST 2020
+NetBSD 9.99.64 (ERLITE) #1: Mon May 25 15:51:56 AEST 2020
simonb%thoreau.thistledown.com.au@localhost:/NetBSD/src-pure/sys-pure/arch/evbmips/compile/ERLITE
Cavium Octeon CN50XX
total memory = 512 MB
@@ -30,20 +30,20 @@
com0 at iobus0 address 0x0001180000000800: ns16650, no ERS, working fifo
com0: console
com at iobus0 address 0x0001180000000c00 not configured
-octeon_rnm0 at iobus0 address 0x0001180040000000
+octrnm0 at iobus0 address 0x0001180040000000
entropy: ready
-octeon_twsi at iobus0 address 0x0001180000001000 not configured
+octtwsi at iobus0 address 0x0001180000001000 not configured
-octeon_mpi at iobus0 address 0x0001070000001000 not configured
+octmpi at iobus0 address 0x0001070000001000 not configured
-octeon_gmx0 at iobus0 address 0x0001180008000000
+octgmx0 at iobus0 address 0x0001180008000000
-cnmac0 at octeon_gmx0: address=0x0001180008000000: RGMII
+cnmac0 at octgmx0: address=0x0001180008000000: RGMII
cnmac0: Ethernet address 78:8a:20:41:5d:67
atphy0 at cnmac0 phy 7: Atheros AR8035 10/100/1000 PHY, rev. 2
atphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseSX-FDX, 1000baseT-FDX, auto
-cnmac1 at octeon_gmx0: address=0x0001180008000000: RGMII
+cnmac1 at octgmx0: address=0x0001180008000000: RGMII
cnmac1: Ethernet address 78:8a:20:41:5d:68
atphy1 at cnmac1 phy 6: Atheros AR8035 10/100/1000 PHY, rev. 2
atphy1: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseSX-FDX, 1000baseT-FDX, auto
-cnmac2 at octeon_gmx0: address=0x0001180008000000: RGMII
+cnmac2 at octgmx0: address=0x0001180008000000: RGMII
cnmac2: Ethernet address 78:8a:20:41:5d:69
atphy2 at cnmac2 phy 5: Atheros AR8035 10/100/1000 PHY, rev. 2
atphy2: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseSX-FDX, 1000baseT-FDX, auto
I'll commit this in the next few days unless someone has any strong
objections that I can't talk you out of :).
Cheers,
Simon.
? evbmips/compile/ERLITE
Index: evbmips/cavium/autoconf.c
===================================================================
RCS file: /cvsroot/src/sys/arch/evbmips/cavium/autoconf.c,v
retrieving revision 1.4
diff -d -p -u -r1.4 autoconf.c
--- evbmips/cavium/autoconf.c 1 Apr 2019 06:12:51 -0000 1.4
+++ evbmips/cavium/autoconf.c 25 May 2020 05:55:20 -0000
@@ -180,7 +180,7 @@ device_register(device_t dev, void *aux)
if (device_is_a(dev, "cnmac")) {
prop_set_cnmac(dev);
- } else if (device_is_a(dev, "octeon_gmx")) {
+ } else if (device_is_a(dev, "octgmx")) {
prop_set_octeon_gmx(dev);
}
}
Index: evbmips/conf/ERLITE
===================================================================
RCS file: /cvsroot/src/sys/arch/evbmips/conf/ERLITE,v
retrieving revision 1.24
diff -d -p -u -r1.24 ERLITE
--- evbmips/conf/ERLITE 19 Jan 2020 01:25:05 -0000 1.24
+++ evbmips/conf/ERLITE 25 May 2020 05:55:21 -0000
@@ -120,10 +120,10 @@ bootbus0 at mainbus?
com* at iobus?
-octeon_rnm* at iobus?
+octrnm* at iobus?
-octeon_gmx* at iobus?
-cnmac* at octeon_gmx?
+octgmx* at iobus?
+cnmac* at octgmx?
dwctwo* at iobus?
usb* at dwctwo?
Index: mips/cavium/octeon1p_iobus.c
===================================================================
RCS file: /cvsroot/src/sys/arch/mips/cavium/octeon1p_iobus.c,v
retrieving revision 1.2
diff -d -p -u -r1.2 octeon1p_iobus.c
--- mips/cavium/octeon1p_iobus.c 1 May 2015 07:23:47 -0000 1.2
+++ mips/cavium/octeon1p_iobus.c 25 May 2020 05:55:21 -0000
@@ -68,7 +68,7 @@ static const struct iobus_unit iobus_uni
};
static const struct iobus_dev iobus_dev_octeon_rnm = {
- .name = "octeon_rnm",
+ .name = "octrnm",
.nunits = RNM_NUNITS,
.units = iobus_units_octeon_rnm
};
@@ -83,7 +83,7 @@ static const struct iobus_unit iobus_uni
};
static const struct iobus_dev iobus_dev_octeon_twsi = {
- .name = "octeon_twsi",
+ .name = "octtwsi",
.nunits = MIO_TWS_NUNITS,
.units = iobus_units_octeon_twsi
};
@@ -98,7 +98,7 @@ static const struct iobus_unit iobus_uni
};
static const struct iobus_dev iobus_dev_octeon_mpi = {
- .name = "octeon_mpi",
+ .name = "octmpi",
.nunits = MPI_NUNITS,
.units = iobus_units_octeon_mpi
};
@@ -112,7 +112,7 @@ static const struct iobus_unit iobus_uni
};
static const struct iobus_dev iobus_dev_octeon_gmx = {
- .name = "octeon_gmx",
+ .name = "octgmx",
.nunits = GMX_IF_NUNITS,
.units = iobus_units_octeon_gmx
};
Index: mips/cavium/dev/octeon_dwctwo.c
===================================================================
RCS file: /cvsroot/src/sys/arch/mips/cavium/dev/octeon_dwctwo.c,v
retrieving revision 1.9
diff -d -p -u -r1.9 octeon_dwctwo.c
--- mips/cavium/dev/octeon_dwctwo.c 12 Jul 2016 03:34:25 -0000 1.9
+++ mips/cavium/dev/octeon_dwctwo.c 25 May 2020 05:55:21 -0000
@@ -139,7 +139,7 @@ static struct dwc2_core_params octeon_dw
.hibernation = -1,
};
-CFATTACH_DECL_NEW(octeon_dwctwo, sizeof(struct octeon_dwc2_softc),
+CFATTACH_DECL_NEW(octdwctwo, sizeof(struct octeon_dwc2_softc),
octeon_dwc2_match, octeon_dwc2_attach, NULL, NULL);
static int
Index: mips/cavium/dev/octeon_gmx.c
===================================================================
RCS file: /cvsroot/src/sys/arch/mips/cavium/dev/octeon_gmx.c,v
retrieving revision 1.9
diff -d -p -u -r1.9 octeon_gmx.c
--- mips/cavium/dev/octeon_gmx.c 24 Apr 2020 09:29:26 -0000 1.9
+++ mips/cavium/dev/octeon_gmx.c 25 May 2020 05:55:21 -0000
@@ -168,7 +168,7 @@ EVCNT_ATTACH_STATIC(octeon_gmx_intr_evcn
struct octeon_gmx_port_softc *__octeon_gmx_port_softc[3/* XXX */];
#endif
-CFATTACH_DECL_NEW(octeon_gmx, sizeof(struct octeon_gmx_softc),
+CFATTACH_DECL_NEW(octgmx, sizeof(struct octeon_gmx_softc),
octeon_gmx_match, octeon_gmx_attach, NULL, NULL);
static int
@@ -229,7 +229,7 @@ octeon_gmx_attach(device_t parent, devic
gmx_aa.ga_port_type = sc->sc_port_types[i];
gmx_aa.ga_gmx = sc;
gmx_aa.ga_gmx_port = port_sc;
- config_found_sm_loc(self, "octeon_gmx", NULL, &gmx_aa,
+ config_found_sm_loc(self, "octgmx", NULL, &gmx_aa,
octeon_gmx_print, octeon_gmx_submatch);
#ifdef OCTEON_ETH_DEBUG
Index: mips/cavium/dev/octeon_mpi.c
===================================================================
RCS file: /cvsroot/src/sys/arch/mips/cavium/dev/octeon_mpi.c,v
retrieving revision 1.2
diff -d -p -u -r1.2 octeon_mpi.c
--- mips/cavium/dev/octeon_mpi.c 1 Jun 2015 22:55:12 -0000 1.2
+++ mips/cavium/dev/octeon_mpi.c 25 May 2020 05:55:21 -0000
@@ -155,7 +155,7 @@ octeon_mpi_attach(device_t parent, devic
#endif
octeon_mpi_reg_wr(sc, MPI_TX_OFFSET, 0);
- config_found_ia(&sc->sc_dev, "octeon_mpi", &pa, spi_print);
+ config_found_ia(&sc->sc_dev, "octmpi", &pa, spi_print);
}
#if 0
Index: mips/cavium/dev/octeon_rnm.c
===================================================================
RCS file: /cvsroot/src/sys/arch/mips/cavium/dev/octeon_rnm.c,v
retrieving revision 1.6
diff -d -p -u -r1.6 octeon_rnm.c
--- mips/cavium/dev/octeon_rnm.c 18 May 2020 16:05:09 -0000 1.6
+++ mips/cavium/dev/octeon_rnm.c 25 May 2020 05:55:21 -0000
@@ -141,7 +141,7 @@ static uint64_t octeon_rnm_load(struct o
static void octeon_rnm_iobdma(struct octeon_rnm_softc *, uint64_t *, unsigned);
static void octeon_rnm_delay(uint32_t);
-CFATTACH_DECL_NEW(octeon_rnm, sizeof(struct octeon_rnm_softc),
+CFATTACH_DECL_NEW(octrnm, sizeof(struct octeon_rnm_softc),
octeon_rnm_match, octeon_rnm_attach, NULL, NULL);
static int
Index: mips/cavium/dev/octeon_uart.c
===================================================================
RCS file: /cvsroot/src/sys/arch/mips/cavium/dev/octeon_uart.c,v
retrieving revision 1.3
diff -d -p -u -r1.3 octeon_uart.c
--- mips/cavium/dev/octeon_uart.c 2 Jun 2015 05:11:34 -0000 1.3
+++ mips/cavium/dev/octeon_uart.c 25 May 2020 05:55:21 -0000
@@ -93,7 +93,7 @@ const struct com_regs octeon_uart_com_re
}
};
-CFATTACH_DECL_NEW(octeon_uart_iobus, sizeof(struct octeon_uart_iobus_softc),
+CFATTACH_DECL_NEW(com_iobus, sizeof(struct octeon_uart_iobus_softc),
octeon_uart_iobus_match, octeon_uart_iobus_attach, NULL, NULL);
int
Index: mips/conf/files.octeon
===================================================================
RCS file: /cvsroot/src/sys/arch/mips/conf/files.octeon,v
retrieving revision 1.4
diff -d -p -u -r1.4 files.octeon
--- mips/conf/files.octeon 6 Jun 2015 04:34:23 -0000 1.4
+++ mips/conf/files.octeon 25 May 2020 05:55:21 -0000
@@ -51,33 +51,33 @@ file arch/mips/cavium/dev/octeon_smi.c i
# I/O Bus devices
-attach com at iobus with octeon_uart_iobus
-file arch/mips/cavium/dev/octeon_uart.c octeon_uart_iobus
+attach com at iobus with com_iobus
+file arch/mips/cavium/dev/octeon_uart.c com_iobus
options COM_REGMAP
-device octeon_rnm
-attach octeon_rnm at iobus
-file arch/mips/cavium/dev/octeon_rnm.c octeon_rnm & rnd
+device octrnm
+attach octrnm at iobus
+file arch/mips/cavium/dev/octeon_rnm.c octrnm & rnd
-device octeon_twsi: i2cbus
-attach octeon_twsi at iobus
-file arch/mips/cavium/dev/octeon_twsi.c octeon_twsi
+device octtwsi: i2cbus
+attach octtwsi at iobus
+file arch/mips/cavium/dev/octeon_twsi.c octtwsi
-device octeon_mpi {}
-attach octeon_mpi at iobus
-file arch/mips/cavium/dev/octeon_mpi.c octeon_mpi
+device octmpi {}
+attach octmpi at iobus
+file arch/mips/cavium/dev/octeon_mpi.c octmpi
-device octeon_gmx {}
-attach octeon_gmx at iobus
-file arch/mips/cavium/dev/octeon_gmx.c octeon_gmx
+device octgmx {}
+attach octgmx at iobus
+file arch/mips/cavium/dev/octeon_gmx.c octgmx
# On-chip ethernet device(s)
device cnmac: ether, ifnet, arp, mii
-attach cnmac at octeon_gmx
+attach cnmac at octgmx
file arch/mips/cavium/dev/if_cnmac.c cnmac
-attach dwctwo at iobus with octeon_dwctwo
-file arch/mips/cavium/dev/octeon_dwctwo.c octeon_dwctwo
+attach dwctwo at iobus with octdwctwo
+file arch/mips/cavium/dev/octeon_dwctwo.c octdwctwo
# Boot-Bus
pool redzone disabled for 'kmem-08192'
Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
2006, 2007, 2008, 2009, 2010, 2011, 2012, 2013, 2014, 2015, 2016, 2017,
2018, 2019, 2020 The NetBSD Foundation, Inc. All rights reserved.
Copyright (c) 1982, 1986, 1989, 1991, 1993
The Regents of the University of California. All rights reserved.
NetBSD 9.99.64 (ERLITE) #0: Mon May 25 15:44:31 AEST 2020
simonb%thoreau.thistledown.com.au@localhost:/NetBSD/src-pure/sys-pure/arch/evbmips/compile/ERLITE
Cavium Octeon CN50XX
total memory = 512 MB
avail memory = 498 MB
pool redzone disabled for 'buf8k'
pool redzone disabled for 'buf64k'
entropy: no seed from bootloader
timecounter: Timecounters tick every 10.000 msec
mainbus0 (root)
cpunode0 at mainbus0: 2 cores, crypto+kasumi, 64bit-mul, unaligned-access ok
cpu0 at cpunode0 core 0: 500.00MHz (hz cycles = 5000000, delay divisor = 500)
cpu0: Cavium CN50xx (0xd0601) Rev. 1 with software emulated floating point
cpu0: 64 TLB entries, 512TB (49-bit) VAs, 512TB (49-bit) PAs, 256MB max page size
cpu0: 32KB/128B 4-way set-associative L1 instruction cache
cpu0: 16KB/128B 64-way set-associative write-through coherent L1 data cache
cpu0: 128KB/128B 8-way set-associative write-back L2 unified cache
cpu1 at cpunode0 core 1: disabled (uniprocessor kernel)
wdog0 at cpunode0: default period is 4 seconds
iobus0 at mainbus0
iobus0: initializing POW
iobus0: initializing FPA
com0 at iobus0 address 0x0001180000000800: ns16650, no ERS, working fifo
com0: console
com at iobus0 address 0x0001180000000c00 not configured
octeon_rnm0 at iobus0 address 0x0001180040000000
entropy: ready
octeon_twsi at iobus0 address 0x0001180000001000 not configured
octeon_mpi at iobus0 address 0x0001070000001000 not configured
octeon_gmx0 at iobus0 address 0x0001180008000000
cnmac0 at octeon_gmx0: address=0x0001180008000000: RGMII
cnmac0: Ethernet address 78:8a:20:41:5d:67
atphy0 at cnmac0 phy 7: Atheros AR8035 10/100/1000 PHY, rev. 2
atphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseSX-FDX, 1000baseT-FDX, auto
cnmac1 at octeon_gmx0: address=0x0001180008000000: RGMII
cnmac1: Ethernet address 78:8a:20:41:5d:68
atphy1 at cnmac1 phy 6: Atheros AR8035 10/100/1000 PHY, rev. 2
atphy1: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseSX-FDX, 1000baseT-FDX, auto
cnmac2 at octeon_gmx0: address=0x0001180008000000: RGMII
cnmac2: Ethernet address 78:8a:20:41:5d:69
atphy2 at cnmac2 phy 5: Atheros AR8035 10/100/1000 PHY, rev. 2
atphy2: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseSX-FDX, 1000baseT-FDX, auto
dwctwo0 at iobus0 address 0x0001180068000000
dwctwo0: Core Release: 2.65a (snpsid=4f54265a)
usb0 at dwctwo0: USB revision 2.0
bootbus0 at mainbus0
timecounter: Timecounter "clockinterrupt" frequency 100 Hz quality 0
timecounter: Timecounter "mips3_cp0_counter" frequency 500000000 Hz quality 100
uhub0 at usb0: NetBSD (0x0000) DWC2 root hub (0x0000), class 9/0, rev 2.00/1.00, addr 1
uhub0: 1 port with 1 removable, self powered
umass0 at uhub0 port 1 configuration 1 interface 0
umass0: SanDisk (0x0781) Cruzer Glide (0x5575), rev 2.00/1.27, addr 2
umass0: using SCSI over Bulk-Only
scsibus0 at umass0: 2 targets, 1 lun per target
uhub0: autoconfiguration error: illegal enable change, port 1
sd0 at scsibus0 target 0 lun 0: <SanDisk, Cruzer Glide, 1.27> disk removable
sd0: 7633 MB, 15509 cyl, 16 head, 63 sec, 512 bytes/sect x 15633408 sectors
WARNING: 1 error while detecting hardware; check system log.
boot device: sd0
root on cnmac0
nfs_boot: trying DHCP/BOOTP
nfs_boot: DHCP next-server: 192.168.0.42
nfs_boot: my_name=erlite
nfs_boot: my_domain=thistledown.com.au
nfs_boot: my_addr=192.168.0.9
nfs_boot: my_mask=255.255.255.0
nfs_boot: gateway=192.168.0.1
root on 192.168.0.42:/tftpboot/erlite.root
kern.module.path=/stand/evbmips/9.99.64/modules
WARNING: no TOD clock present
WARNING: using filesystem time
WARNING: CHECK AND RESET THE DATE!
pool redzone disabled for 'kmem-08192'
Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
2006, 2007, 2008, 2009, 2010, 2011, 2012, 2013, 2014, 2015, 2016, 2017,
2018, 2019, 2020 The NetBSD Foundation, Inc. All rights reserved.
Copyright (c) 1982, 1986, 1989, 1991, 1993
The Regents of the University of California. All rights reserved.
NetBSD 9.99.64 (ERLITE) #1: Mon May 25 15:51:56 AEST 2020
simonb%thoreau.thistledown.com.au@localhost:/NetBSD/src-pure/sys-pure/arch/evbmips/compile/ERLITE
Cavium Octeon CN50XX
total memory = 512 MB
avail memory = 498 MB
pool redzone disabled for 'buf8k'
pool redzone disabled for 'buf64k'
entropy: no seed from bootloader
timecounter: Timecounters tick every 10.000 msec
mainbus0 (root)
cpunode0 at mainbus0: 2 cores, crypto+kasumi, 64bit-mul, unaligned-access ok
cpu0 at cpunode0 core 0: 500.00MHz (hz cycles = 5000000, delay divisor = 500)
cpu0: Cavium CN50xx (0xd0601) Rev. 1 with software emulated floating point
cpu0: 64 TLB entries, 512TB (49-bit) VAs, 512TB (49-bit) PAs, 256MB max page size
cpu0: 32KB/128B 4-way set-associative L1 instruction cache
cpu0: 16KB/128B 64-way set-associative write-through coherent L1 data cache
cpu0: 128KB/128B 8-way set-associative write-back L2 unified cache
cpu1 at cpunode0 core 1: disabled (uniprocessor kernel)
wdog0 at cpunode0: default period is 4 seconds
iobus0 at mainbus0
iobus0: initializing POW
iobus0: initializing FPA
com0 at iobus0 address 0x0001180000000800: ns16650, no ERS, working fifo
com0: console
com at iobus0 address 0x0001180000000c00 not configured
octrnm0 at iobus0 address 0x0001180040000000
entropy: ready
octtwsi at iobus0 address 0x0001180000001000 not configured
octmpi at iobus0 address 0x0001070000001000 not configured
octgmx0 at iobus0 address 0x0001180008000000
cnmac0 at octgmx0: address=0x0001180008000000: RGMII
cnmac0: Ethernet address 78:8a:20:41:5d:67
atphy0 at cnmac0 phy 7: Atheros AR8035 10/100/1000 PHY, rev. 2
atphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseSX-FDX, 1000baseT-FDX, auto
cnmac1 at octgmx0: address=0x0001180008000000: RGMII
cnmac1: Ethernet address 78:8a:20:41:5d:68
atphy1 at cnmac1 phy 6: Atheros AR8035 10/100/1000 PHY, rev. 2
atphy1: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseSX-FDX, 1000baseT-FDX, auto
cnmac2 at octgmx0: address=0x0001180008000000: RGMII
cnmac2: Ethernet address 78:8a:20:41:5d:69
atphy2 at cnmac2 phy 5: Atheros AR8035 10/100/1000 PHY, rev. 2
atphy2: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseSX-FDX, 1000baseT-FDX, auto
dwctwo0 at iobus0 address 0x0001180068000000
dwctwo0: Core Release: 2.65a (snpsid=4f54265a)
usb0 at dwctwo0: USB revision 2.0
bootbus0 at mainbus0
timecounter: Timecounter "clockinterrupt" frequency 100 Hz quality 0
timecounter: Timecounter "mips3_cp0_counter" frequency 500000000 Hz quality 100
uhub0 at usb0: NetBSD (0x0000) DWC2 root hub (0x0000), class 9/0, rev 2.00/1.00, addr 1
uhub0: 1 port with 1 removable, self powered
umass0 at uhub0 port 1 configuration 1 interface 0
umass0: SanDisk (0x0781) Cruzer Glide (0x5575), rev 2.00/1.27, addr 2
umass0: using SCSI over Bulk-Only
scsibus0 at umass0: 2 targets, 1 lun per target
uhub0: autoconfiguration error: illegal enable change, port 1
sd0 at scsibus0 target 0 lun 0: <SanDisk, Cruzer Glide, 1.27> disk removable
sd0: 7633 MB, 15509 cyl, 16 head, 63 sec, 512 bytes/sect x 15633408 sectors
WARNING: 1 error while detecting hardware; check system log.
boot device: sd0
root on cnmac0
nfs_boot: trying DHCP/BOOTP
nfs_boot: DHCP next-server: 192.168.0.42
nfs_boot: my_name=erlite
nfs_boot: my_domain=thistledown.com.au
nfs_boot: my_addr=192.168.0.9
nfs_boot: my_mask=255.255.255.0
nfs_boot: gateway=192.168.0.1
root on 192.168.0.42:/tftpboot/erlite.root
kern.module.path=/stand/evbmips/9.99.64/modules
WARNING: no TOD clock present
WARNING: using filesystem time
WARNING: CHECK AND RESET THE DATE!
Home |
Main Index |
Thread Index |
Old Index