Re: Crazy cross-MIPS-boards stunts possible?

["Maciej W. Rozycki" <macro%linux-mips.org@localhost>]

On Wed, 9 Dec 2020, Swift Griggs wrote:

> However, since you seemed well versed on both MIPS and FPGAs, I am curious if
> you know of any thing about projects like this one:
> 
> https://www.eetimes.com/altera-mips-roll-fpga-optimized-soft-processor/

 Hmm, that's almost 10 years old.

> My basic curiosity asks:
> 
>   * Any MIPS soft cores work notably well on any modern FPGA hobbyist
>     boards that might eventually (or already) run NetBSD?

 No idea, I have been out of touch with this stuff for several years now.  
I reckon MIPS released its IP royalty-free sometime between 2018-2019; I'd 
investigate this area and see if anyone has picked that for their project.

>   * Have you ever heard of any hardware upgrades for MIPS machines? I'd
>     love to hear about someone making R-series chips again for SGIs as
>     upgrades. Seems like FPGAs are fast enough maybe something like the
>     68080 68k FPGA accelerator (ie... FPGA that emulates a very fast 68k
>     processor gets pin-compatible adaptation for old 68k computers).

 I don't know how things look like these days, but the MIPS RTLs I worked 
with some 10+ years ago were limited to like 25-33MHz in terms of the CPU 
clock, so they were easily beaten even by gear so obsolete as faster 
DECstation systems.  I wouldn't exactly call them number crunchers.  I 
guess things must have progressed since with FPGA technology, but so they 
have with hard circuits, so I can't imagine hard cores not to continue 
being better at least by an order of magnitude.

> Besides SGI were other MIPS boards socketed? Would someone ever be able to try
> the same FPGA-replacement stunt on an non-SGI MIPS board/system/server ?

 Well, certain DECstation hardware used CPU daughtercards, but you have 
probably already known that, and then as much as I like it myself given 
its architecture and performance (and also issues with ageing PSUs) I 
wouldn't consider it the first choice for designing upgrades these days.

 The Malta we already discussed; the choice of CPU daughtercards was very 
wide (I could name at least a dozen myself) and certainly new ones could 
be designed.  I came across ones with a BGA socket too, which allowed the 
CPU core itself to be instantaneously replaced, but that wasn't the usual 
configuration.

 Finally there were the Algorithmics boards, some of which also accepted 
CPU daughtercards (and some that IIRC had a system controller daughtercard 
instead).  But this is still 20+ years old hardware.

 All these systems used to run with NetBSD and have been reasonably well 
documented (with DECstation hardware the least actually).  I don't know 
about other ones; there used to be so many MIPS boards at one point and I 
am fairly sure other ones also used CPU daugthercards.

> I know a lot of this stuff is very pie-in-the-sky but things I never thought
> would happen *have* happened in this age of FPGAs....

 Chances are you know better than I do nowadays.  What I have outlined 
above is pretty much what I remember now from the old days.

 NB much to my relief my fears as to the loss of the development effort 
for the nanoMIPS ISA turned out premature, and so I guess as to the ISA 
itself: <https://gcc.gnu.org/pipermail/gcc/2020-December/234448.html>.

  Maciej