PR bit in Machine Status Register

[shubha%dl.com@localhost (Shubha Ramachandrappa)]

Hi,
        I am trying to port our prorpietary real time kernel(68K)
onto mpc860. I have some doubts..

1. If we have a user stack and an Supervisor stack, then 
where should the Supervisor stack pointer be stored- ??? IS
SPRG0 register, a convention for Storing Supervisor stack pointer.

2. Which are the registers that i need to store during 
interrupt processing.

3. MSR[PR] bit in Machine Status register - Is it set by hardware or is
it the Operating systems response to set it while it is switching to user mode. 

Thanx in Advance,
-Shubha