Hi,

I was studying the existing *ppc locore.[sS]'s in the last days, to
find out what needs to be changed for Amiga PPC boards.

Two problems I have:

a) the kernel code/data memory can be at several places, e.g.
   0x07000000, 0x08000000, or somewhere near 0x48000000 or 0x66000000.

   Thats too far away to reach it from the primary exception code snippets
   with either a b/bl or ba/bla (26bit relative / absolute addresses).

   Ok, there are only a few places; I need just to carefully select a
   scratch register to synthesize the branch target address, and save
   and restore it if needed.

b) more difficult: the tempsave and disisave regions (32 bytes each) used
   to save registers at exception entry can't be reached via 16bit signed
   absolute addresses, as on the other machines (there is no fast memory near
   0).

   Instead of err... saving a register to a SPRG, synthesizing the address of
   the save area in it, and use it to save... it might be a bit faster to
   save (say) r1 to SPRG1 (as already done on most of them), read SPRG0 into
   it, and use it as base for those stores/loads.

   This makes the save area effectively per-CPU.

   Now, if we make that area bigger then 2x 32 bytes, we can put the intstack
   and the spill stack and the curproc/curpcb pointer into it, too, and be
   ready for multicpu (modulo a bit of locking when accessing the hash table
   and spill table).

Does that make sense? If yes, I'd write it that way right away, so that others
might copy it (or rather: so that we could put most of it into the common 
area, where others can share it if they wish).

Regards,
	Ignatios
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