What does mfspr(SPR_L2CR);?

[Jochen Kunz <jkunz%unixag-kl.fh-kl.de@localhost>]

Hi.

On my way to bring NetBSD to the RS/6000 43P-150 I got this:
[see bootlog below]
As I am no PPC guru: Could someone with more intimate knowledge of the
PPC architecture explain me what cpu_config_l2cr() and especially
"mfspr(SPR_L2CR);" does?
(explain == Point me to the right place in the right documentation.)

>From the comments in the source this is the "L2 Control Register".
"mfspr()" is an inline function with the inline assembler instruction
"mfspr" to read the "L2 Control Register". To me this doesn't look
dangerous. So I am surprised to get a trap.

The machine boots fine if I disable the call to cpu_config_l2cr().

 ok
0 > boot net 
BOOTP S = 1 
FILE: ofwboot.elf
Load Addr=0x4000 Max Size=0xbfc000 
FINAL Packet Count = 122 
DEFAULT CATCH!, code=fff00300 at   %SRR0: 00c1afe0   %SRR1: 00003030 
 ok
0 > go 
>> NetBSD/ofppc OpenFirmware Boot, Revision 1.5
>> (jkunz@SirTobie, Fri Aug  8 23:24:09 CEST 2003)
net_open: client addr: 192.168.2.103
net_open: subnet mask: 255.255.255.0
net_open: server addr: 192.168.2.4
net_open: server path: /bigtmp/nfsroot/NetBSD/ofppc
net_open: file name: ofwboot.elf
Using IP address: 192.168.2.103
root addr=192.168.2.4 path=/bigtmp/nfsroot/NetBSD/ofppc
2846760+310056 [153696+141234]=0x34aeb8
 start=0x100000
Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004
    The NetBSD Foundation, Inc.  All rights reserved.
Copyright (c) 1982, 1986, 1989, 1991, 1993
    The Regents of the University of California.  All rights reserved.

NetBSD 2.99.11 (GENERIC-ofppc) #23: Fri Dec 17 18:16:24 CET 2004
        jkunz@Zimbo:/usr/src/build/GENERIC-ofppc
total memory = 768 MB
avail memory = 734 MB
bootpath /pci@80000000/ethernet@c/netbsd
cbootpath /pci@80000000/ethernet@c
mainbus0 (root): IBM,7043-150
cpu0 at mainbus0 (PowerPC,604e@0): 604ev (Revision 1.0), ID 0 (primary)
cpu0: HID0 c001c086<EMCP,DBP,NHR,ICE,DCE,SGE,BHT,NOPDST>
cpu0: 56.25 MHz
cpu_config_l2cr 1
trap: pid 0.1 (swapper): kernel PGM trap @ 0x30bc58 (SRR1=0x80032)
Press a key to panic.
panic: trap
Stopped in pid 0.1 (swapper) at netbsd:cpu_Debugger+0x10:       lwz     r0, r1, 0
x14
db> t
0x004549c0: at panic+0x19c
0x00454a50: at trap+0x11c
0x00454ad0: kernel PGM trap by cpu_config_l2cr+0x30: srr1=0x80032
            r1=0x454b90 cr=0x22000044 xer=0 ctr=0x313f78
0x00454b90: at cpu_config_l2cr+0x2c
0x00454bb0: at cpu_setup+0x43c
0x00454cb0: at cpu_attach_common+0x84
0x00454cd0: at cpu_attach+0x84
0x00454d00: at config_attach_loc+0x2d4
0x00454d60: at config_found_sm_loc+0x64
0x00454d80: at mainbus_attach+0x250
0x00454e30: at config_attach_loc+0x2d4
0x00454e90: at config_rootfound+0x48
0x00454eb0: at cpu_configure+0x1c
0x00454ec0: at configure+0x58
0x00454ee0: at main+0x328
0x00454f30: at 0x1000c4
db> 


powerpc/oea/cpu_subr.c:
void
cpu_config_l2cr(int pvr)
{
        register_t l2cr;

printf("\ncpu_config_l2cr 1\n"); /* this is printed */
        l2cr = mfspr(SPR_L2CR);
printf("cpu_config_l2cr 2\n"); /* instead of printing this I get above trap */


>From the OpenFirmWare:
0 > dev PowerPC,604e@0  ok
0 > ls
00c4d568: /l2-cache
 ok
0 > .properties
name                    PowerPC,604e
device_type             cpu
reg                     00000000
cpu-version             000a0100
ibm,loc-code            P1-C1
clock-frequency         165a0bc0
bus-frequency           04f790d5
timebase-frequency      013de435
status                  okay
tlb-split
d-tlb-size              00000080
d-tlb-sets              00000040
i-tlb-size              00000080
i-tlb-sets              00000040
reservation-granule-size00000020
tlb-sets                00000080
tlb-size                00000100
d-cache-size            00008000
i-cache-size            00008000
d-cache-sets            00000100
i-cache-sets            00000100
i-cache-block-size      00000020
d-cache-block-size      00000020
i-cache-line-size       00000020
d-cache-line-size       00000020
external-control
graphics
performance-monitor
l2-cache                00c4d568
existing                00000000 80000000 80000000 80000000
available               00004000 00bfc000 01000000 fef00000
translations            00000000 30000000 00000000 00000010 f9c80000 00040000 
f9c80000 00000028
                        fe000000 01000000 fe000000 00000028 fe000000 00010000 
fe000000 00000028
                        fec00000 00200000 fec00000 00000028 fee00000 00200000 
fee00000 00000028

 ok
0 > dev l2-cache  ok
0 > ls
 ok
0 > .properties
name                    l2-cache
device_type             cache
i-cache-size            00100000
d-cache-size            00100000
i-cache-sets            00008000
d-cache-sets            00008000
i-cache-line-size       00000020
d-cache-line-size       00000020
cache-unified
status                  okay
ibm,loc-code            P1-C1

 ok
0 >

-- 


tschüß,
       Jochen

Homepage: http://www.unixag-kl.fh-kl.de/~jkunz/