Hello,

I'm glad to announce that port to ibm405 core embedded
in Xilinx Virtex {2-Pro, 4 FX} series FPGAs is now
available:

  ftp://koza.uamt.feec.vutbr.cz/pub/jh/virtex.tar
  ftp://koza.uamt.feec.vutbr.cz/pub/jh/virtex.diff
  ftp://koza.uamt.feec.vutbr.cz/pub/jh/virtex-gsrd-edk.tar.bz2

  [this is tempory location, may suffer downtime]

The code is primarily targeted at Xilinx's GSRD reference
design [1] on a ML403 (Virtex 4 FX chip) board, although
it is capable of running on a custom Virtex 2-Pro board
too (in a minimal setup) and adaptation for custom FPGA
designs is expected to be more or less SMOP.

Drivers (see [2]):

  * cdmac: DMA controller, interfaces to MPMC memory
    controller on one side and to LocalLink channels
    on the other

  * temac: gigabit ethernet core, MAC is hard-core
    inside the Virtex 4, DMA transfers are handled
    via LocalLink to the cdmac

  * xlcom: UartLite serial port

  * llfb: framebuffer hooked to the LocalLink, this
    driver is incomplete and experimental

This port is a bit unusual in that it has to be loaded
into the RAM over JTAG -- there is no canonical boot
method for this kind of devices (actually, there's no
canonical _anything at all_, even "on-chip" buses may
be connected arbitrarily ;-).

This also means that for now, you'll need Xilinx EDK
package -- the tar.bz2 file mentioned above contains
EDK project directory with precompiled bitstream images
(I'll actually upload the file in an hour or so, it's
too huge for my home wifi).

Note that existing ibm4xx code wasn't really designed
for such an exotic setup as we get with the Virtex,
but I didn't want the initial evbppc/virtex changes
to be too intrusive -- so there's still a bit of
duplication. I'd prefer to start pushing things into
nicer shape when/if the virtex bits are checked in.

This work has been done for www.dspfpga.com, more
development is planned. Enjoy,

	-- Jachym

[1] http://www.xilinx.com/gsrd/

[2] full dmesg output:

Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
    The NetBSD Foundation, Inc.  All rights reserved.
Copyright (c) 1982, 1986, 1989, 1991, 1993
    The Regents of the University of California.  All rights reserved.

NetBSD 3.99.15 (GSRD) #0: Tue Apr 25 00:49:51 CEST 2006
	jh@nbholecek1:/usr/obj/netbsd.virtex/sys/arch/evbppc/compile/GSRD
Xilinx Virtex PPC405D5Xn core
total memory = 32768 KB
avail memory = 29472 KB
plb0 (root)
cpu0 at plb0: 300MHz 405D5Xn (Revision 20.48)
cpu0: instruction cache size 16384 line size 32
cpu0: data cache size 16384 line size 32
cpu0: owner 200 core family 1 cache 5 version 0 asic 30
 at cpu0 not configured
dcr0 at plb0
cdmac0 at dcr0 irq 2: CDMAC transfer engine
temac0 at dcr0 irq 1: Tri-mode Ethernet MAC
llfb0 at dcr0: LocalLink framebuffer
llfb0: 640x480x32b framebuffer at 0x314020
xlcom0 at dcr0 irq 0: UartLite serial port
xlcom0: console
cdmac0: channel 3 (Rx) claimed by temac0
cdmac0: channel 2 (Tx) claimed by temac0
makphy0 at temac0 phy 0: Marvell 88E1111 Gigabit PHY, rev. 1
makphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT, 1000baseT-FDX, auto
cdmac0: channel 0 (Tx) claimed by llfb0
wsdisplay0 at llfb0
opb at plb0 not configured
pchb at plb0 not configured
dcr at plb0 not configured
biomask 0 netmask 4 ttymask 4
Setting PIT to 300000000/100 = 3000000
root on temac0
nfs_boot: trying DHCP/BOOTP
nfs_boot: DHCP next-server: 192.168.2.140
nfs_boot: my_addr=192.168.2.180
nfs_boot: my_mask=255.255.255.0
root on 192.168.2.140:/nfsroot/evbppc
root time: 0x444f1392
init: copying out path `/sbin/init' 11
192.168.2.140:/nfsroot/evbppc: inaccurate wcc data (ctime) detected, disabling wcc
wsdisplay0: screen 0 added (80x30, vt100 emulation)