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Re: X server support?



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Hello,

On Sep 10, 2008, at 1:22 PM, Tim Rightnour wrote:

On 10-Sep-2008 Michael Lorenz wrote:
Basically - look at genfb_pci.c, grep it for PCI_MAGIC_IO_RANGE, pick
an offset that's safe on your hardware ( it may or may not correspond
to the real bus address of the PCI IO space but X and genfb need to
agree about it and no PCI BARs should EVER be mapped there ). Put
#define PCI_MAGIC_IO_RANGE 0xwhatever
into param.h and rebuild both X and the kernel.
If 0xf2000000 is safe just use it and you can use macppc's binaries.

Will this trick only work with genfb, or is it a general support mechanisim?

Either way, I believe 0xf2000000 will work.

All 'my' framebuffer drivers support it. That includes machfb, voodoofb, chipsfb, r128fb, shark's console code, radeonfb and genfb at pci. X expects to mmap 64kB IO space at PCI_MAGIC_IO_RANGE - although many macs implement considerably more ( 8MB on bandit for instance ) I've never seen any (Open)Firmware - apple or not - map any IO BAR above 0xffff so 64kB should be enough. What the drivers do is simply this - in their mmap() methods they return the physical address that corresponds to the IO tag belonging to the PCI bus the graphics chip belongs to. This is necessary since many macs have more than one PCI host bridge and each implements its own IO space ( same goes for Suns with two Psychos for instance ) That way X can map the right IO space through /dev/ttyE0 without any knowledge of the underlying PCI bus, host bridges and so on. 0xf2000000 just happens to be the address where the 1st bandit's IO space would be on a 1st generation PCI PowerMac ( the 2nd bandit would have its IO space at 0xf4000000, there's address space reserved for up to four bandits ), on all newer models this address range is either reserved, used for PCI IO space or used for something not PCI related so it will never collide with any valid BAR. Also, this mechanism isn't PCI specific, shark's graphics chip sits on a VL bus.

have fun
Michael

-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.7 (Darwin)

iQEVAwUBSMifU8pnzkX8Yg2nAQIRUQf6A0MqBqoNyoe0IsaVmfT8Y2AZaW08iN6Z
XNhUg4dDGVirkEKYafVh7RlBvcuyIs0DyOasUzr12Nrp/9P/pbRelXkCXMFAGAun
WMHIPGzid+gAJvwveDE86Eh3p3EC3VjaQunkUF4DE/6XGImgr7oqNkBKVRD9kGR2
r/BIkxqSEPSX5IdMasqRt3aBvXw66H6joj+bR5hDzcbHqNMCZo88DUwfvBHupwz1
SRxES9qqE4ivGQx9g7qG+UvSv7pQrVMS22b+bu3iyU9UURMeo8WVdCtfd6XmjccC
NomTMsAZWy+5uINq9VO3rNoZTIhUelD8WuBdGkQn7+5EtGbmGDxEuA==
=2GBk
-----END PGP SIGNATURE-----


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