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Folks:
	As you may have noticed, I've finally taken the good advice from
	Chris and Antti and am starting to merge my O2 patches into the
	NetBSD CVS tree.  What this means in the short term is that both
	the IP22 and IP32 trees may be in various states of disrepair 
	until I get all my changes in (I'm testing the IP32 stuff as I
	go, but I haven't yet tested resulting kernels on IP22 systems;
	I'll fix the fallout, if any, once all the basic O2 stuff is in
	the tree).

	Here's the current status of what is done and what still isn't:

	    Done:
		* Basic O2 cleanup, better interrupt handling, better
		  console support for serial console, start of sgi-
		  specific code to deal with R5k secondary caches.

	    Pending:
		* O2 PCI fixup support.
		* More cleanup around interrupts and machine init.
		* Some more flesh for the MEC driver skeleton.
		* MIPS architecture-dependent changes like the R5k cache
		  code and associated goo.

	    Still TBD:
		* Figuring out why Rm5200 O2+ systems have interrupt issues.
		* Better MIPS pmap support for R5k (no VCE, so need to deal
		  with aliasing issues in software).
		* Real IP32 interrupt code.
		* Real Driver(s) for the MEC ethernet, and various other O2
		  gadgets like the VICE engine, graphics, etc [everything
		  after MEC is really pie-in-the-sky].

Please let me know if you uncover any issues, 
--rafal

----
Rafal Boni                                                     rafal@attbi.com
  We are all worms.  But I do believe I am a glowworm.  -- Winston Churchill


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Folks:
	As you may have noticed, I've finally taken the good advice from
	Chris and Antti and am starting to merge my O2 patches into the
	NetBSD CVS tree.  What this means in the short term is that both
	the IP22 and IP32 trees may be in various states of disrepair 
	until I get all my changes in (I'm testing the IP32 stuff as I
	go, but I haven't yet tested resulting kernels on IP22 systems;
	I'll fix the fallout, if any, once all the basic O2 stuff is in
	the tree).

	Here's the current status of what is done and what still isn't:

	    Done:
		* Basic O2 cleanup, better interrupt handling, better
		  console support for serial console, start of sgi-
		  specific code to deal with R5k secondary caches.

	    Pending:
		* O2 PCI fixup support.
		* More cleanup around interrupts and machine init.
		* Some more flesh for the MEC driver skeleton.
		* MIPS architecture-dependent changes like the R5k cache
		  code and associated goo.

	    Still TBD:
		* Figuring out why Rm5200 O2+ systems have interrupt issues.
		* Better MIPS pmap support for R5k (no VCE, so need to deal
		  with aliasing issues in software).
		* Real IP32 interrupt code.
		* Real Driver(s) for the MEC ethernet, and various other O2
		  gadgets like the VICE engine, graphics, etc [everything
		  after MEC is really pie-in-the-sky].

Please let me know if you uncover any issues, 
- --rafal

- ----
Rafal Boni                                                     rafal@attbi.com
  We are all worms.  But I do believe I am a glowworm.  -- Winston Churchill

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