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hi!


I think that I will use the card of USB. However, when the same irq
is already used, it cannot do establish.
# PCI has allowed sharing of irq.

When I investigate, crime_intr_establish() has not allowed sharing of
IRQ.

crime.c::crime_intr_establish() ---

        if (crime[irq].func != NULL)
                return NULL;    /* panic("Cannot share CRIME interrupts!"); */

--

dmesg.boot ---

ohci0 at pci0 dev 3 function 0: Acer Labs M5237 USB Host Controller (rev. 0x03)
ohci0: interrupting at crime interrupt 13
ohci0: OHCI version 1.0, legacy support
usb0 at ohci0: USB revision 1.0
uhub0 at usb0
uhub0: Acer Labs OHCI root hub, class 9/0, rev 1.00/1.00, addr 1
uhub0: 2 ports with 2 removable, self powered
ohci1 at pci0 dev 3 function 1: Acer Labs M5237 USB Host Controller (rev. 0x03)
ohci1: couldn't establish interrupt at crime interrupt 13
ohci2 at pci0 dev 3 function 2: Acer Labs M5237 USB Host Controller (rev. 0x03)
ohci2: couldn't establish interrupt at crime interrupt 13
ehci0 at pci0 dev 3 function 3: Acer Labs product 0x5239 (rev. 0x01)
ehci0: interrupting at crime interrupt 10
ehci0: EHCI version 1.0
ehci0: wrong number of companions (3 != 1)
ehci0: ohci or uhci probably not configured
ehci0: init failed, error=13

---

Not mace_intr_establish() but crime_intr_establish() is called, pci(4)
is attached at macepci(4), Moreover attached at mace(4). I feel this
strange. ;-<
Moreover, mace has allowed sharing. We think that it should call here.

As mentioned above, I think that such change is required.
# Is macepci_intr_establish() etc. required? ;-)
--
kiyohara


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Index: dev/crime.c
===================================================================
RCS file: /cvsroot/src/sys/arch/sgimips/dev/crime.c,v
retrieving revision 1.18
diff -c -r1.18 crime.c
*** dev/crime.c	18 Jan 2004 04:06:42 -0000	1.18
--- dev/crime.c	1 Sep 2004 18:36:28 -0000
***************
*** 183,189 ****
  void *
  crime_intr_establish(int irq, int level, int (*func)(void *), void *arg)
  {
! 	if (irq < 8)
  		return mace_intr_establish(irq, level, func, arg);
  	
  	if (crime[irq].func != NULL)
--- 183,189 ----
  void *
  crime_intr_establish(int irq, int level, int (*func)(void *), void *arg)
  {
! 	if (irq < 16)
  		return mace_intr_establish(irq, level, func, arg);
  	
  	if (crime[irq].func != NULL)
***************
*** 209,216 ****
  	crime_intstat = bus_space_read_8(crm_iot, crm_ioh, CRIME_INTSTAT);
  	crime_ipending = (crime_intstat & crime_intmask);
  
! 	if (crime_ipending & 0xff)
! 		mace_intr(crime_ipending & 0xff);
  
          if (crime_ipending & 0xffff0000) {
  	/*
--- 209,216 ----
  	crime_intstat = bus_space_read_8(crm_iot, crm_ioh, CRIME_INTSTAT);
  	crime_ipending = (crime_intstat & crime_intmask);
  
! 	if (crime_ipending & 0xffff)
! 		mace_intr(crime_ipending & 0xffff);
  
          if (crime_ipending & 0xffff0000) {
  	/*
***************
*** 256,261 ****
--- 256,271 ----
  }
  
  void
+ crime_intr_unmask(unsigned int intr)
+ {
+ 	u_int64_t mask;
+ 
+ 	mask = bus_space_read_8(crm_iot, crm_ioh, CRIME_INTMASK);
+ 	mask &= ~(1 << intr);
+ 	bus_space_write_8(crm_iot, crm_ioh, CRIME_INTMASK, mask);
+ }
+ 
+ void
  crime_bus_reset(void)
  {
  	bus_space_write_8(crm_iot, crm_ioh, CRIME_CPU_ERROR_STAT, 0);
Index: dev/crimevar.h
===================================================================
RCS file: /cvsroot/src/sys/arch/sgimips/dev/crimevar.h,v
retrieving revision 1.3
diff -c -r1.3 crimevar.h
*** dev/crimevar.h	18 Jan 2004 00:54:55 -0000	1.3
--- dev/crimevar.h	1 Sep 2004 18:36:28 -0000
***************
*** 39,41 ****
--- 39,42 ----
  };
  
  void crime_intr_mask(unsigned int);
+ void crime_intr_unmask(unsigned int);
Index: include/pci_machdep.h
===================================================================
RCS file: /cvsroot/src/sys/arch/sgimips/include/pci_machdep.h,v
retrieving revision 1.5
diff -c -r1.5 pci_machdep.h
*** include/pci_machdep.h	29 Jul 2004 16:55:25 -0000	1.5
--- include/pci_machdep.h	1 Sep 2004 18:36:28 -0000
***************
*** 55,60 ****
--- 55,63 ----
  	pcireg_t	(*pc_conf_read)(pci_chipset_tag_t, pcitag_t, int);
  	void		(*pc_conf_write)(pci_chipset_tag_t, pcitag_t, int,
  				pcireg_t);
+ 	void		*(*intr_establish)(int , int, int (*)(void *), void *); 
+ 	void		(*intr_disestablish)(void *ih);
+ 
  	bus_space_tag_t iot;
  	bus_space_handle_t ioh;
  };
Index: mace/mace.c
===================================================================
RCS file: /cvsroot/src/sys/arch/sgimips/mace/mace.c,v
retrieving revision 1.4
diff -c -r1.4 mace.c
*** mace/mace.c	10 Jul 2004 08:47:33 -0000	1.4
--- mace/mace.c	1 Sep 2004 18:36:28 -0000
***************
*** 267,273 ****
  {
  	int i;
  
! 	if (intr < 0 || intr >= 8)
  		panic("invalid interrupt number");
  
  	for (i = 0; i < MACE_NINTR; i++)
--- 267,273 ----
  {
  	int i;
  
! 	if (intr < 0 || intr >= 16)
  		panic("invalid interrupt number");
  
  	for (i = 0; i < MACE_NINTR; i++)
***************
*** 292,297 ****
--- 292,325 ----
  }
  
  void
+ mace_intr_disestablish(void *cookie)
+ {
+ 	int intr = -1, level = 0, i;
+ 
+ 	for (i = 0; i < MACE_NINTR; i++)
+ 		if (&maceintrtab[i] == cookie) {
+ 			evcnt_detach(&maceintrtab[i].evcnt);
+ 			for (intr = 0;
+ 			    maceintrtab[i].irq == (1 << intr); intr ++);
+ 			level = maceintrtab[i].intrmask;
+ 			maceintrtab[i].irq = 0;
+ 			maceintrtab[i].intrmask = 0;
+ 		        maceintrtab[i].func = NULL;
+ 		        maceintrtab[i].arg = NULL;
+ 			bzero(&maceintrtab[i].evcnt, sizeof (struct evcnt));
+ 			bzero(&maceintrtab[i].evname,
+ 			    sizeof (maceintrtab[i].evname));
+ 			break;
+ 		}
+ 	if (intr == -1)
+ 		panic("mace: lost maceintrtab");
+ 
+ 	crime_intr_unmask(intr);
+ 	aprint_verbose("mace: disestablished interrupt %d (level %x)\n",
+ 	    intr, level);
+ }
+ 
+ void
  mace_intr(int irqs)
  {
  	u_int64_t isa_irq, isa_mask;
Index: mace/macevar.h
===================================================================
RCS file: /cvsroot/src/sys/arch/sgimips/mace/macevar.h,v
retrieving revision 1.1
diff -c -r1.1 macevar.h
*** mace/macevar.h	18 Jan 2004 04:06:43 -0000	1.1
--- mace/macevar.h	1 Sep 2004 18:36:28 -0000
***************
*** 44,47 ****
--- 44,48 ----
  };
  
  void *	mace_intr_establish(int, int, int (*)(void *), void *);
+ void	mace_intr_disestablish(void *);
  void	mace_intr(int);
Index: mace/pci_mace.c
===================================================================
RCS file: /cvsroot/src/sys/arch/sgimips/mace/pci_mace.c,v
retrieving revision 1.2
diff -c -r1.2 pci_mace.c
*** mace/pci_mace.c	19 Jan 2004 10:28:28 -0000	1.2
--- mace/pci_mace.c	1 Sep 2004 18:36:29 -0000
***************
*** 132,137 ****
--- 132,139 ----
  
  	pc->pc_conf_read = macepci_conf_read;
  	pc->pc_conf_write = macepci_conf_write;
+ 	pc->intr_establish = mace_intr_establish;
+ 	pc->intr_disestablish = mace_intr_disestablish;
  
  	bus_space_write_4(pc->iot, pc->ioh, MACE_PCI_ERROR_ADDR, 0);
  	bus_space_write_4(pc->iot, pc->ioh, MACE_PCI_ERROR_FLAGS, 0);
Index: pci/pci_machdep.c
===================================================================
RCS file: /cvsroot/src/sys/arch/sgimips/pci/pci_machdep.c,v
retrieving revision 1.13
diff -c -r1.13 pci_machdep.c
*** pci/pci_machdep.c	18 Jan 2004 00:50:08 -0000	1.13
--- pci/pci_machdep.c	1 Sep 2004 18:36:29 -0000
***************
*** 213,219 ****
  	void *arg;
  {
  
! 	return (void *)(*platform.intr_establish)(ih, 0, func, arg);
  }
  
  void
--- 213,219 ----
  	void *arg;
  {
  
! 	return (void *)(pc->intr_establish)(ih, 0, func, arg);
  }
  
  void
***************
*** 222,226 ****
  	void *cookie;
  {
  
! 	panic("pci_intr_disestablish: not implemented");
  }
--- 222,226 ----
  	void *cookie;
  {
  
! 	(pc->intr_disestablish)(cookie);
  }

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