On Tue, Dec 14, 2004 at 09:59:23PM +1100, Simon Burge wrote:

> So on the R5000, the L2 cache doesn't help with alias detection?

Apparently so.

> Is this problem specific to the way the caches are wired up on this model
> SGI, or a problem with the R5000 in general?

Can't tell -- I have no non-SGI r5k gear.

> If I read your suggested patch correctly, it will cause extra unneeded
> cache flushes on other CPUs/machines with multi-way data caches that
> have also have an L2 cache.

Yes, that's why I didn't commit it -- it greatly hurts performance.  It's
wrong, and I'd welcome suggestions on how to properly handle it.

> What is the "system coma issue"?  I've seen a handful of passing references
> to it now...

Under heavy compile load, the system will "freeze" -- dropping to ddb and
killing the cc1plus process (it's _always_ cc1plus) wakes it back up.

I think that it's related to errata 3 for the r5k.  I saw it on my rev1.0
r5k IP32, but I don't see it on my rev2.0 r5k IP24.
-- 

-- Chris
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