Subject: cache problem
To: None <port-sparc@NetBSD.ORG>
From: Arne Steinkamm <arne@Steinkamm.COM>
List: port-sparc
Date: 12/19/1995 13:55:46
Hi,
one of my 1+ has a broken cache chip. Is it possible to disable
the cache (build a kernelwhich does this) ?
Is it possible to get HW-information to translate the boot-rom messages
about the broken cache line (something like f01c bad..)
to the physical chip to replace it ?
Greetings
.//. Arne
--
Arne Steinkamm | Mail (MIME): Arne@Steinkamm.COM IRC: Arne
Tel.: +49.89.299.756 | URL: http://WWW.Steinkamm.COM/ NIC-Handle: AS306
Robert-Koch-Str. 4 | "There's coffee in that nebula"
D-80538 Muenchen | Cptn. Kathryn Janeway, ST:VOY - The Cloud