Subject: Re: problems with Viking and interrupt reg mapping
To: Paul Kranenburg <pk@cs.few.eur.nl>
From: Aaron Brown <abrown@eecs.harvard.edu>
List: port-sparc
Date: 03/27/1997 09:13:12
On Thu, 27 Mar 1997, Paul Kranenburg wrote:
> > romprop() is indeed getting these values, and the new mapping for the
> > first one is installed... I added some printfs to the code, and see
> > that ra.ra_nvaddrs == 5 before the first iteration of the loop,
> > but immediately after the setpte4m() call, ra.ra_nvaddrs == 0!!
> >
> > Then, since it falls out of the loop, i is now equal to 1, but
> > ra.ra_vaddrs[1] == 0x0!!
> >
> > So, something in setpte4m() is trashing the memory that the romaux
> > is in ... odd, since the romaux is an automatic...
>
>
> This must be related to the "flash clear" of the cache that's being
> done when writing PTEs during bootstrap. Apparently, this does not
> do what I want, which is: write back dirty cache lines to memory
> and invalidate the entire (data) cache.
Nope. The old "flash clear" code in cache.c had a bug that made the
flash clear never execute. When I fixed it to execute, it just zeroed the
entire cache, destroying any dirty data. I thought I commented it out and
stuck in a comment about that...maybe not.
--Aaron