Subject: Re: need assembler programmer
To: None <port-sparc@NetBSD.org>
From: John Nemeth <jnemeth@victoria.tc.ca>
List: port-sparc
Date: 05/12/2007 11:42:31
On Oct 1,  5:54am, John Nemeth wrote:
}
}      I just committed a fix to the interrupt handler in
} sys/arch/sparc/dev/fd.c.  There is also a "fastpath" version of the
} handler written in assembly language located in
} sys/arch/sparc/sparc/bsd_fdintr.s.  I don't speak sparc assembly
} language (actually it's been many years since I did any assembly
} language programming).  So, I'm looking for somebody to make the same
} change that I did to the C version in fd.c:1.133.  I would like to do
} this quickly, so I can pullup the changes to the netbsd-4 branch.
} Could somebody help out with the assembly language version, please?

     With the help of martin@, I've come up with a prelimiary patch:

--- bsd_fdintr.s        2005-12-11 04:19:08.000000000 -0800
+++ bsd_fdintr.s.new    2007-05-12 11:27:45.000000000 -0700
@@ -216,7 +216,7 @@ _ENTRY(_C_LABEL(fdchwintr))
 nextc:
        btst    NE7_RQM, %l7                    ! room in fifo?
        bnz,a   0f
-        btst   NE7_NDM, %l7                    ! overrun?
+        btst   NE7_NDM, %l7                    ! execution finished?

        ! we filled/emptied the FIFO; update fdc->sc_buf & fdc->sc_tc
        st      R_tc, [R_fdc + FDC_TC]
@@ -224,8 +224,14 @@ nextc:
        st      R_buf, [R_fdc + FDC_DATA]

 0:
-       bz      resultphase                     ! overrun/underrun
-       btst    NE7_DIO, %l7                    ! IO direction
+       bz      resultphase
+
+XXX: below line intended to check R_tc for 0
+       tst     R_tc
+       bnz     3f
+XXX: panic("fdc: overrun"); here
+
+3:     btst    NE7_DIO, %l7                    ! IO direction
        bz      1f
         deccc  R_tc
        ldub    [R_fifo], %l7                   ! reading:
@@ -247,14 +253,11 @@ nextc:
        ! flip TC bit in auxreg
        FD_ASSERT_TC

-       ! we have some time to kill; anticipate on upcoming
-       ! result phase.
-       add     R_fdc, FDC_STATUS, R_stat       ! &fdc->sc_status[0]
-       mov     -1, %l7
-       st      %l7, [R_fdc + FDC_NSTAT]        ! fdc->sc_nstat = -1;
+XXX: would moving the two "st"s from above down here provide sufficient delay?
+XXX: delay(10);

        FD_DEASSERT_TC
-       b,a     resultphase1
+       b,a     x


 sensei:

Anybody out there that can help flesh this out?

}-- End of excerpt from John Nemeth