In port-sparc64, Eric Benoit wrote:

>> Hmm, your CPU looks a bit odd too, I thought all UltraSPARC-IIi modules
>> for U5/U10 boxes with 300MHz or more had 2MB cache.

>AFAIR the 333MHz and 400MHz modules have 2M cache, the 270MHz, 360MHz 
>and 440MHz (U10 only, unofficial in newer U5 boards?) have 256K.

Don't tell that to my machines :-)

mainbus0 (root): SUNW,Ultra-5_10: hostid 80a05aab
cpu0 at mainbus0: SUNW,UltraSPARC-IIi @ 300 MHz, version 0 FPU
cpu0: 32K instruction (32 b/l), 16K data (32 b/l), 512K external (64 b/l)

mainbus0 (root): SUNW,Ultra-5_10: hostid 80a03e2e
cpu0 at mainbus0: SUNW,UltraSPARC-IIi @ 440 MHz, version 0 FPU
cpu0: 32K instruction (32 b/l), 16K data (32 b/l), 2048K external (64 b/l)

the 360 MHz one isn't switched on right now, so I can't check the cache...

gert

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