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Re: Building current
> size_t i;
> uint64_t v, nv;
> for (i = 0; i < 16; i++) {
> v = ~(uint64_t)0 << i;
> nv = ~v;
> printf("%zu: mask %08llx not %08llx\n", i, v, nv);
> }
> 0: mask ffffffff not ffffffff00000000
> 1: mask 1fffffffe not fffffffe00000001
> 2: mask 3fffffffc not fffffffc00000003
> ashq %r6,$-1,%r2
Interestingly, NetBSD/vax 1.4T gives me the same behaviour (at least
once I s/%zu/%u/, because 1.4T doesn't have the z prefix), at least on
my simulated VAX. The .s file says
ashq -4(fp),$-1,-12(fp)
but the generated instruction stream says
79 ad fc 8f ff ff ff ff 00 00 00 00 ad f4
which disassembles to
ashq -04(fp),$00000000ffffffff,-0c(fp)
(The disassembler uses hex, hence 00000000ffffffff not 4294967295 and
0c not 12.)
When I change it to
uint64_t v, nv, o;
o = ~(int64_t)0;
for (i = 0; i < 16; i++) {
v = o << i;
then it works, and the assignment to o turns into
movq $0xffffffffffffffff,-28(fp)
This leads me to suspect that somewhere in a codegen path the original
code is losing track of the width of the literal and thus generating
"$-1" instead of "$0xffffffffffffffff", since it apparently knows how
to use the latter for that value. If it's the same bug, it must be a
very durable one, though - but if the interfaces between gcc and the
per-arch codegen module have remained relatively stable and the VAX
codegen has thus remained stable, it could be a long-standing bug
there. (I don't rule out a bug in my simulator masquerading as
something else, though the similarity of behaviour between what I see
and what's reported upthread leads me to suspect that's not it.)
All the above compiles were done with no optimization. When I turn the
optimizer loose on it, each version has "ashq r6,$-1,r2" and exhibits
the misbehaviour. But the modifed code, additionally modified by
making o volatile, with full optimization, says
"movq $0xffffffffffffffff,-8(fp)" and works.
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