KA48 / VAXstation VLC cache question

[John Klos <john%ziaspace.com@localhost>]

Hi,

For ages I've thought that my VAXstation VLC has been much slower than I 
thought it rightly should be. It seems only slightly faster than benchmark 
results show an 11/780 to be even though DEC's documentation says it 
should be five to six times faster.

While putting some test code in sys/arch/vax/vax/ka48.c, though, I see 
that the 6K of cache is never enabled. Wow! So that's why these machines 
are so pokey with NetBSD!

Looking in the KA-660 CPU Module Technical Manual, it seems that enabling 
the cache is straightforward: enable and flush the cache. I'm not sure why 
the procedure which is currently in ka48.c appears more complicated - from 
what I can tell, but I could be wrong, it seems to expect the cache to be 
mapped to memory locations and clears the cache that way. Since the code 
makes reference to PARCTL which is part of the CMCTL controller which 
isn't in the VLC, I don't see why that's in ka48_cache_enable. The KA660 
manual says to memory map the cache one needs to do a mtpr(1, 37), and I 
don't see that anywhere.

It seems that ka48.c and ka48.h have many errors, so I'm trying to forget 
what I see there and instead am going from the KA660 manual. The CCR is 
IPR 37 (decimal) and bit 4 should always be one. mfpr(37) gives 16. So I 
assume that mtpr(4, 37), then mtpr(2, 37) is performed, the cache should 
be enabled:

"When Enable Cache is set the cache should be flushed by writing a one to 
the Flush Cache bit. Enable Cache is cleared when RESET_L is asserted."

This is suggesting that once the Enable Cache bit is set, then the cache 
flush should be performed. However, after doing this, mfpr(37) still gives 
16. Hmmm...

Any thoughts, anyone? How do we enable the cache on the KA48?

Thanks,
John