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Re: support for FPU-less VAX?



2015-10-01 20:42 GMT+02:00 Antonio Carlini <a.carlini%ntlworld.com@localhost>:
> These instructions are implemented in hardware only if the optional CVAX
> 78134 Floating-point accelerator is present in the system. They must be
> software emulated if the CVAX 78134 is not included.

That is exactly what the CVAX CPU Chip Engineering Specification
(http://simh.trailing-edge.com/semi/docs/cvaxspec.txt) says about the
floating point instructions.
For the mentioned integer instructions (DIVL, MULL, EMUL), it supports
what Johnny said: The 78034 implements them in a slower "basic"
version and they are passed to the FP companion if present.


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