On 2016-04-01 19:00, Paul Koning wrote:
On Apr 1, 2016, at 8:32 AM, Rhialto <rhialto%falu.nl@localhost> wrote: On Thu 31 Mar 2016 at 21:24:04 -0700, Jake Hamby wrote:On VAX, you might be able to do the same thing if there's a particularly long instruction that's an effective nop and is faster to execute than the number of bytes it is.Is there any mechanism in gcc to jump into the middle of an instruction which is (effectively) a nop when executed from the start, but which can be mostly any (shorter) instruction when entered somewhere in the middle? It's a common technique on 8-bitters such as the 6502, to avoid extra branches:Also on the PDP11, where a classic way to exit with success or fail status from a function goes like this: good: tst (pc)+ bad: sec rts pc I haven't seen GCC do stuff like that, but it may be that it could be made to via peephole optimizers.
I don't think that in general any code above assembler uses the condition codes to communicate status from function calls.
And your code uses the fact at TST clears the carry, as well as skipping the setting of the carry. And the caller will have the status through the carry flag. Very common convention on a PDP-11 (as well as some other processors), but only for assembly code.
But yes, I find that code rather neat. Johnny