An Evening on the theme of FPGAs

[Sevan Janiyan <venture37%geeklan.co.uk@localhost>]

Hello,
Thought I'd post this here for the SuperH fans, the first talk listed is
an open source implementation of SuperH IP (Project J-Core).


July's OSSG/OSHUG (online) meeting is happening on the 16th. We have
three speakers giving talks on the theme of FPGAs.

Details of talks as follows (registration link at the end)

1) Why the J-core open processor is cool

The patents on the bestselling processor of the 1990’s finally
expired, and it’s been cloned as open hardware. J-core scales from
running SMP Linux down to fitting in a tiny 5000 cell ICE-40 FPGA, and
we just uploaded a new open source GPS receiver built around it to github.

Rob Landley maintains the J-core Board Support Package, used to maintain
busybox, maintains toybox (the command line utilities used by Android),
and used to be the linux kernel documentation maintainer.

2) Yosys and nextpnr – open source FPGA update

Find out about the newest developments in Yosys and nextpnr, including
experimental Xilinx support, synthesis improvements and new place and
route algorithms! This talk will also discuss some of the future work
that is planned, with an ambitious target to support 1-million-LUT scale
designs on UltraScale+ devices by the end of the year.

David Shah is a self-employed developer working on nextpnr, the open
source FPGA place-and-route tool. His previous work also includes
Project Trellis, open source bitstream documentation for the Lattice
ECP5 FPGAs.

3) Repurposing Obsolete FPGA-based Products as Development Kits

Commercial FPGA development boards can be relatively cheap or they can
have a lot of logic resources and features, but never at the same time.
When commercial products with large FPGAs become obsolete, they can
often be found dirt cheap on eBay. With a little bit of effort, some of
these products can be reverse engineered and repurposed as generic FPGA
development kits.
This talk will show some examples, and discuss techniques that can be
used to reverse engineer these kind of products.

Tom Verbeure is a hardware engineer at Nvidia where he works on monitor
technology. Before Nvidia, he worked on communication ASICs at Barco,
Alcatel and Conexant. When he’s not mountain biking in one of the many
parks around the SF Bay Area, you can probably find him in his garage,
looking through a microscope trying to trace tiny wires on an old PCB,
or burning up an LED panel in a misguided attempt to control LED cube
with a Cisco WAN modem.

Register at
https://ossg160720.eventbrite.co.uk/
Event page:
https://ossg.bcs.org/blog/event/an-evening-on-the-theme-of-fpgas/