Re: CVS commit: [matt-nb5-mips64] src/sys/arch/mips/mips

[Masao Uebayashi <uebayasi%tombi.co.jp@localhost>]

> Log Message:
> CP0 ECC and CACHE_ERR "not implemented" on RMI XLS, so avoid accessing them

> @@ -508,8 +508,10 @@
>  
>       if (MIPS_HAS_LLSC) {
>               if (CPUISMIPS64) {
> +#if !defined(MIPS64_XLS)                                     /* CP0 reg #17 
> "reserved" */
>                       SHOW64(MIPS_COP_0_LLADDR, "lladdr");
>                       SHOW64(MIPS_COP_0_WATCH_LO, "watchlo");
> +#endif
>               } else {
>                       SHOW32(MIPS_COP_0_LLADDR, "lladdr");
>                       SHOW32(MIPS_COP_0_WATCH_LO, "watchlo");

Could you make this like #if !defined(__HAVE_COP0_ECC)?  #ifdef'ing by product
name leaves difficulties when those who don't know its specs maintain the
code.

(Let's not repeat MIPS3_5900 tragedy. ;)

Masao