Re: CVS commit: src/sys/arch/arm

[SUENAGA Hiroki <hsuenaga%netbsd.org@localhost>]

On 2015/05/20 2:30, Matt Thomas wrote:
> 
>> On May 19, 2015, at 2:20 AM, SUENAGA Hiroki <hsuenaga%netbsd.org@localhost> wrote:
>>
>> Module Name:	src
>> Committed By:	hsuenaga
>> Date:		Tue May 19 09:20:19 UTC 2015
>>
>> Modified Files:
>> 	src/sys/arch/arm/arm: cpufunc_asm_pj4b.S
>> 	src/sys/arch/arm/marvell: armadaxp.c mvsocreg.h
>>
>> Log Message:
>> fix Marvell Coherency Barrier register address.
>> configure coherency bus maintance broadcast using MPIDR. we need to configure
>> this regardless of 'options MULTIPROCESSOR.'
> 
> Please move the MPIDR defines to <arm/armreg.h> and use __BIT or __BITS.

Done for implementation neutral(just rewrite to use __BIT/__BITS),
Cortex A9 implementation, and PJ4B implementation.

-- 
SUENAGA Hiroki <hsuenaga%netbsd.net@localhost>
PGP: 66B3 8939 6758 20BA F243  89EC 557A 8CFB ABA9 5E92