Re: CVS commit: src/sys/arch/x86/x86

[Masanobu SAITOH <msaitoh%execsw.org@localhost>]

On 2018/01/11 18:18, SAITOH Masanobu wrote:
> Module Name:	src
> Committed By:	msaitoh
> Date:		Thu Jan 11 09:18:16 UTC 2018
>
> Modified Files:
> 	src/sys/arch/x86/x86: cpu.c
>
> Log Message:
>   Changing CR4 register may change cpuid values. For example, setting
> CR4_OSXSAVE sets CPUID2_OSXSAVE. The CPUID2_OSXSAVE is in ci_feat_val[1],
> so update it after changing CR4.
>
>
> To generate a diff of this commit:
> cvs rdiff -u -r1.144 -r1.145 src/sys/arch/x86/x86/cpu.c
>
> Please note that diffs are not public domain; they are subject to the
> copyright notices on the relevant files.

XXX:
 - Other than ci_feat_val[1] might be changed.
 - Updating microcode may also changes cpuid values.

--
-----------------------------------------------
                SAITOH Masanobu (msaitoh%execsw.org@localhost
                                 msaitoh%netbsd.org@localhost)