Re: CVS commit: src/sys/arch/aarch64

[Maxime Villard <max%m00nbsd.net@localhost>]

> Module Name:    src
> Committed By:   ryo
> Date:           Fri Aug  3 16:32:55 UTC 2018
>
> Modified Files:
>         src/sys/arch/aarch64/aarch64: genassym.cf locore.S
>         src/sys/arch/aarch64/conf: kern.ldscript
>
> Log Message:
> set kernel text/rodata readonly when not defined DDB.
> set readonly segment on 2Mbytes aligned. (kernel image is mapped with 2Mbytes L2 block)
>
>
> To generate a diff of this commit:
> cvs rdiff -u -r1.5 -r1.6 src/sys/arch/aarch64/aarch64/genassym.cf
> cvs rdiff -u -r1.13 -r1.14 src/sys/arch/aarch64/aarch64/locore.S
> cvs rdiff -u -r1.5 -r1.6 src/sys/arch/aarch64/conf/kern.ldscript
>
> Please note that diffs are not public domain; they are subject to the
> copyright notices on the relevant files.

Maybe we should just pass the protection bits in l2_setblocks, and map the
kernel text/rodata as RO right away. It would also make it possible to map
rodata/data as non executable, with PXN|UXN. (Looking at the code it seems
to me rodata/data are executable currently.)

We would make three calls, to map

	.text as RX
	.rodata as R
	.data as RW

a bit like in amd64 [1]. Regarding the DDB ifndef, probably there must be
a bit in ARM64 saying "disable page protection", so it could be set when
we enter DDB, and we could remove the ifndef.

Maxime

[1] https://nxr.netbsd.org/xref/src/sys/arch/amd64/amd64/locore.S?r=1.173#675