Re: CVS commit: src/sys/arch

[Andrew Doran <ad%netbsd.org@localhost>]

On Thu, May 21, 2020 at 11:19:49PM +0200, Joerg Sonnenberger wrote:
> On Thu, May 21, 2020 at 09:12:31PM +0000, Andrew Doran wrote:
> > Module Name:	src
> > Committed By:	ad
> > Date:		Thu May 21 21:12:31 UTC 2020
> > 
> > Modified Files:
> > 	src/sys/arch/x86/acpi: acpi_wakeup.c
> > 	src/sys/arch/x86/include: i82489var.h
> > 	src/sys/arch/x86/x86: cpu.c lapic.c x86_machdep.c
> > 	src/sys/arch/xen/x86: cpu.c
> > 	src/sys/arch/xen/xen: hypervisor.c xen_clock.c
> > 
> > Log Message:
> > - Recalibrate the APIC timer using the TSC, once the TSC has in turn been
> >   recalibrated using the HPET.  This gets the clock interrupt firing more
> >   closely to HZ.
> 
> Why using the TSC and not the HPET directly? For systems with HPET, same
> question with the ACPI / PCI timer.

The idea I'm going with is:

The TSC is precise and very quick to read, far more so than the other timers
where it's at least 0.5-1us to pull a value from the counter register.  To
get around slowness of the other timers the TSC is calibrated with respect
to the HPET over a long span (seconds).  I have no objection to revisiting
it if we can do better, but this is at least much better than where we were
before.

kern.timecounter.choice = TSC(q=3000, f=1000000000 Hz) lapic(q=-100, f=200000000 Hz) clockinterrupt(q=0, f=100 Hz) hpet0(q=2000, f=14318180 Hz) ACPI-Fast(q=1000, f=3579545 Hz) i8254(q=100, f=1193182 Hz) dummy(q=-1000000, f=1000000 Hz)
kern.timecounter.choice = TSC(q=3000, f=2500000000 Hz) lapic(q=-100, f=100000000 Hz) clockinterrupt(q=0, f=100 Hz) ichlpcib0(q=1000, f=3579545 Hz) hpet0(q=2000, f=14318180 Hz) ACPI-Fast(q=1000, f=3579545 Hz) i8254(q=100, f=1193182 Hz) dummy(q=-1000000, f=1000000 Hz)

Andrew