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[src/trunk]: src/sys/dev/mii Use definitions in mii.h and mdio.h.
details: https://anonhg.NetBSD.org/src/rev/95479425da83
branches: trunk
changeset: 320225:95479425da83
user: msaitoh <msaitoh%NetBSD.org@localhost>
date: Wed Jun 27 07:51:36 2018 +0000
description:
Use definitions in mii.h and mdio.h.
diffstat:
sys/dev/mii/rgephy.c | 13 +++++++------
sys/dev/mii/rgephyreg.h | 6 +-----
2 files changed, 8 insertions(+), 11 deletions(-)
diffs (60 lines):
diff -r 7c38d57ec115 -r 95479425da83 sys/dev/mii/rgephy.c
--- a/sys/dev/mii/rgephy.c Wed Jun 27 06:08:15 2018 +0000
+++ b/sys/dev/mii/rgephy.c Wed Jun 27 07:51:36 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: rgephy.c,v 1.43 2018/06/19 10:36:41 jmcneill Exp $ */
+/* $NetBSD: rgephy.c,v 1.44 2018/06/27 07:51:36 msaitoh Exp $ */
/*
* Copyright (c) 2003
@@ -33,7 +33,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: rgephy.c,v 1.43 2018/06/19 10:36:41 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rgephy.c,v 1.44 2018/06/27 07:51:36 msaitoh Exp $");
/*
@@ -51,6 +51,7 @@
#include <net/if_media.h>
#include <dev/mii/mii.h>
+#include <dev/mii/mdio.h>
#include <dev/mii/miivar.h>
#include <dev/mii/miidevs.h>
@@ -675,9 +676,9 @@
/* RTL8211F */
delay(10000);
/* disable EEE */
- PHY_WRITE(sc, RGEPHY_MII_MACR, 0x0007);
- PHY_WRITE(sc, RGEPHY_MII_MAADR, 0x003c);
- PHY_WRITE(sc, RGEPHY_MII_MACR, 0x4007);
- PHY_WRITE(sc, RGEPHY_MII_MAADR, 0x0000);
+ PHY_WRITE(sc, MII_MMDACR, MMDACR_FN_ADDRESS | MDIO_MMD_AN);
+ PHY_WRITE(sc, MII_MMDAADR, MDIO_AN_EEEADVERT);
+ PHY_WRITE(sc, MII_MMDACR, MMDACR_FN_DATANPI | MDIO_MMD_AN);
+ PHY_WRITE(sc, MII_MMDAADR, 0x0000);
}
}
diff -r 7c38d57ec115 -r 95479425da83 sys/dev/mii/rgephyreg.h
--- a/sys/dev/mii/rgephyreg.h Wed Jun 27 06:08:15 2018 +0000
+++ b/sys/dev/mii/rgephyreg.h Wed Jun 27 07:51:36 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: rgephyreg.h,v 1.10 2018/06/19 10:36:41 jmcneill Exp $ */
+/* $NetBSD: rgephyreg.h,v 1.11 2018/06/27 07:51:36 msaitoh Exp $ */
/*
* Copyright (c) 2003
@@ -64,10 +64,6 @@
#define RGEPHY_MII_PHYCR1 0x18 /* PHY Specific control register 1 */
#define RGEPHY_PHYCR1_MDI_MMCE __BIT(9)
#define RGEPHY_PHYCR1_ALDPS_EN __BIT(2)
-#define RGEPHY_MII_MACR 0x0d /* MMD Access control register */
-#define RGEPHY_MACR_FUNCTION __BITS(15,14)
-#define RGEPHY_MACR_DEVAD __BITS(4,0)
-#define RGEPHY_MII_MAADR 0x0e /* MMD Access address data register */
#define RGEPHY_MII_PHYSR 0x1a /* PHY Specific status register */
#define RGEPHY_PHYSR_ALDPS __BIT(14)
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