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[src/trunk]: src/sys/arch/x86/x86 Use a switch, we can (and will) optimize ea...
details: https://anonhg.NetBSD.org/src/rev/0acb1118aa8a
branches: trunk
changeset: 320311:0acb1118aa8a
user: maxv <maxv%NetBSD.org@localhost>
date: Sun Jul 01 07:18:56 2018 +0000
description:
Use a switch, we can (and will) optimize each case separately. No
functional change.
diffstat:
sys/arch/x86/x86/fpu.c | 34 +++++++++++++++++++++++-----------
1 files changed, 23 insertions(+), 11 deletions(-)
diffs (64 lines):
diff -r 66fb8294a6ab -r 0acb1118aa8a sys/arch/x86/x86/fpu.c
--- a/sys/arch/x86/x86/fpu.c Sat Jun 30 22:47:51 2018 +0000
+++ b/sys/arch/x86/x86/fpu.c Sun Jul 01 07:18:56 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu.c,v 1.44 2018/06/29 19:34:35 maxv Exp $ */
+/* $NetBSD: fpu.c,v 1.45 2018/07/01 07:18:56 maxv Exp $ */
/*
* Copyright (c) 2008 The NetBSD Foundation, Inc. All
@@ -96,7 +96,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.44 2018/06/29 19:34:35 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.45 2018/07/01 07:18:56 maxv Exp $");
#include "opt_multiprocessor.h"
@@ -661,24 +661,36 @@
}
KASSERT(pcb->pcb_fpcpu == NULL);
- if (i386_use_fxsave) {
+ switch (x86_fpu_save) {
+ case FPU_SAVE_FSAVE:
+ memset(&fpu_save->sv_87, 0, x86_fpu_save_size);
+ fpu_save->sv_87.s87_tw = 0xffff;
+ fpu_save->sv_87.s87_cw = x87_cw;
+ break;
+ case FPU_SAVE_FXSAVE:
+ memset(&fpu_save->sv_xmm, 0, x86_fpu_save_size);
+ fpu_save->sv_xmm.fx_mxcsr = __INITIAL_MXCSR__;
+ fpu_save->sv_xmm.fx_mxcsr_mask = x86_fpu_mxcsr_mask;
+ fpu_save->sv_xmm.fx_cw = x87_cw;
+ break;
+ case FPU_SAVE_XSAVE:
+ case FPU_SAVE_XSAVEOPT:
memset(&fpu_save->sv_xmm, 0, x86_fpu_save_size);
fpu_save->sv_xmm.fx_mxcsr = __INITIAL_MXCSR__;
fpu_save->sv_xmm.fx_mxcsr_mask = x86_fpu_mxcsr_mask;
fpu_save->sv_xmm.fx_cw = x87_cw;
- /* Force a reload of CW */
- if ((x87_cw != __INITIAL_NPXCW__) &&
- (x86_fpu_save == FPU_SAVE_XSAVE ||
- x86_fpu_save == FPU_SAVE_XSAVEOPT)) {
+ /*
+ * Force a reload of CW if we're using the non-default
+ * value.
+ */
+ if (__predict_false(x87_cw != __INITIAL_NPXCW__)) {
fpu_save->sv_xsave_hdr.xsh_xstate_bv |=
XCR0_X87;
}
- } else {
- memset(&fpu_save->sv_87, 0, x86_fpu_save_size);
- fpu_save->sv_87.s87_tw = 0xffff;
- fpu_save->sv_87.s87_cw = x87_cw;
+ break;
}
+
pcb->pcb_fpu_dflt_cw = x87_cw;
if (x86_fpu_eager) {
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