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[src/trunk]: src/sys/arch/mips/mips Add duplicate code that enables 64bit add...
details: https://anonhg.NetBSD.org/src/rev/938d0df3634c
branches: trunk
changeset: 321238:938d0df3634c
user: maya <maya%NetBSD.org@localhost>
date: Wed Mar 07 15:49:45 2018 +0000
description:
Add duplicate code that enables 64bit addressing under the right
macro conditions that is, _LP64.
The existing, previous code uses NOFPU as a condition for it.
This adds duplicated code (and later removes) for easy bisecting.
diffstat:
sys/arch/mips/mips/locore.S | 12 ++++++++++--
1 files changed, 10 insertions(+), 2 deletions(-)
diffs (33 lines):
diff -r 589695d391df -r 938d0df3634c sys/arch/mips/mips/locore.S
--- a/sys/arch/mips/mips/locore.S Wed Mar 07 15:44:15 2018 +0000
+++ b/sys/arch/mips/mips/locore.S Wed Mar 07 15:49:45 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.211 2018/03/07 15:44:15 maya Exp $ */
+/* $NetBSD: locore.S,v 1.212 2018/03/07 15:49:45 maya Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -63,7 +63,7 @@
#include <mips/trap.h>
#include <mips/locore.h>
-RCSID("$NetBSD: locore.S,v 1.211 2018/03/07 15:44:15 maya Exp $")
+RCSID("$NetBSD: locore.S,v 1.212 2018/03/07 15:49:45 maya Exp $")
#include "assym.h"
@@ -85,6 +85,14 @@
mtc0 zero, MIPS_COP_0_CAUSE
COP0_SYNC
+#ifdef _LP64
+ /* Enable 64-bit addressing */
+ mfc0 k0, MIPS_COP_0_STATUS
+ MFC0_HAZARD
+ or k0, MIPS_SR_KX | MIPS_SR_UX
+ mtc0 k0, MIPS_COP_0_STATUS
+#endif
+
#ifdef MIPS64_OCTEON
//
// U-boot on the erlite starts all cpus at the kernel entry point.
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