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[src/trunk]: src/sys/arch/x86/x86 Mmh, add a missing x86_disable_intr(). My i...
details: https://anonhg.NetBSD.org/src/rev/d8d2fe3949a1
branches: trunk
changeset: 321368:d8d2fe3949a1
user: maxv <maxv%NetBSD.org@localhost>
date: Tue Mar 13 16:45:52 2018 +0000
description:
Mmh, add a missing x86_disable_intr(). My intention there was to ensure
interrupts were disabled before the barriers.
diffstat:
sys/arch/x86/x86/svs.c | 5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diffs (26 lines):
diff -r 0e69e7d92a81 -r d8d2fe3949a1 sys/arch/x86/x86/svs.c
--- a/sys/arch/x86/x86/svs.c Tue Mar 13 16:23:40 2018 +0000
+++ b/sys/arch/x86/x86/svs.c Tue Mar 13 16:45:52 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: svs.c,v 1.13 2018/03/01 16:49:06 maxv Exp $ */
+/* $NetBSD: svs.c,v 1.14 2018/03/13 16:45:52 maxv Exp $ */
/*
* Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: svs.c,v 1.13 2018/03/01 16:49:06 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: svs.c,v 1.14 2018/03/13 16:45:52 maxv Exp $");
#include "opt_svs.h"
@@ -647,6 +647,7 @@
u_long psl;
psl = x86_read_psl();
+ x86_disable_intr();
atomic_dec_ulong(&svs_cpu_barrier1);
while (atomic_cas_ulong(&svs_cpu_barrier1, 0, 0) != 0) {
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