[src/trunk]: src/sys/arch Allow IBRS to be disabled dynamically.

[maxv <maxv%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/060413fdb649
branches:  trunk
changeset: 321636:060413fdb649
user:      maxv <maxv%NetBSD.org@localhost>
date:      Thu Mar 29 07:21:24 2018 +0000

description:
Allow IBRS to be disabled dynamically.

diffstat:

 sys/arch/amd64/amd64/locore.S |  10 +++++++++-
 sys/arch/x86/x86/spectre.c    |  32 +++++++++++++++++++++++++++++---
 2 files changed, 38 insertions(+), 4 deletions(-)

diffs (84 lines):

diff -r 3e2b88f6b1a5 -r 060413fdb649 sys/arch/amd64/amd64/locore.S
--- a/sys/arch/amd64/amd64/locore.S     Thu Mar 29 07:15:12 2018 +0000
+++ b/sys/arch/amd64/amd64/locore.S     Thu Mar 29 07:21:24 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: locore.S,v 1.161 2018/03/28 19:56:40 maxv Exp $        */
+/*     $NetBSD: locore.S,v 1.162 2018/03/29 07:21:24 maxv Exp $        */
 
 /*
  * Copyright-o-rama!
@@ -1682,3 +1682,11 @@
        wrmsr
 1234:
 LABEL(ibrs_leave_end)
+
+LABEL(noibrs_enter)
+       NOIBRS_ENTER
+LABEL(noibrs_enter_end)
+
+LABEL(noibrs_leave)
+       NOIBRS_LEAVE
+LABEL(noibrs_leave_end)
diff -r 3e2b88f6b1a5 -r 060413fdb649 sys/arch/x86/x86/spectre.c
--- a/sys/arch/x86/x86/spectre.c        Thu Mar 29 07:15:12 2018 +0000
+++ b/sys/arch/x86/x86/spectre.c        Thu Mar 29 07:21:24 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: spectre.c,v 1.4 2018/03/29 07:15:12 maxv Exp $ */
+/*     $NetBSD: spectre.c,v 1.5 2018/03/29 07:21:24 maxv Exp $ */
 
 /*
  * Copyright (c) 2018 NetBSD Foundation, Inc.
@@ -34,7 +34,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: spectre.c,v 1.4 2018/03/29 07:15:12 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: spectre.c,v 1.5 2018/03/29 07:21:24 maxv Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -129,6 +129,28 @@
 static volatile unsigned long ibrs_cpu_barrier2 __cacheline_aligned;
 
 static void
+ibrs_disable_hotpatch(void)
+{
+       extern uint8_t noibrs_enter, noibrs_enter_end;
+       extern uint8_t noibrs_leave, noibrs_leave_end;
+       u_long psl, cr0;
+       uint8_t *bytes;
+       size_t size;
+
+       x86_patch_window_open(&psl, &cr0);
+
+       bytes = &noibrs_enter;
+       size = (size_t)&noibrs_enter_end - (size_t)&noibrs_enter;
+       x86_hotpatch(HP_NAME_IBRS_ENTER, bytes, size);
+
+       bytes = &noibrs_leave;
+       size = (size_t)&noibrs_leave_end - (size_t)&noibrs_leave;
+       x86_hotpatch(HP_NAME_IBRS_LEAVE, bytes, size);
+
+       x86_patch_window_close(psl, cr0);
+}
+
+static void
 ibrs_enable_hotpatch(void)
 {
        extern uint8_t ibrs_enter, ibrs_enter_end;
@@ -170,10 +192,14 @@
                if (enabled) {
                        ibrs_enable_hotpatch();
                } else {
-                       /* TODO */
+                       ibrs_disable_hotpatch();
                }
        }
 
+       if (!enabled) {
+               wrmsr(MSR_IA32_SPEC_CTRL, 0);
+       }
+
        atomic_dec_ulong(&ibrs_cpu_barrier2);
        while (atomic_cas_ulong(&ibrs_cpu_barrier2, 0, 0) != 0) {
                x86_pause();