[src/trunk]: src/sys/arch/arm/sunxi sun4idma_halt(): do not set the control r...

[bouyer <bouyer%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/c015b2d75b79
branches:  trunk
changeset: 322165:c015b2d75b79
user:      bouyer <bouyer%NetBSD.org@localhost>
date:      Fri Apr 20 18:04:12 2018 +0000

description:
sun4idma_halt(): do not set the control register to 0 but just clear
the LOAD bit. This is how it was done in the allwinner code.
I don't know why but without this, I could play sound (via sunxi_codec)
only once. After the call to sunxi_codec_halt_output(), subsequent play
would output only silence.

diffstat:

 sys/arch/arm/sunxi/sun4i_dma.c |  18 ++++++++++++------
 1 files changed, 12 insertions(+), 6 deletions(-)

diffs (40 lines):

diff -r 955da06862ed -r c015b2d75b79 sys/arch/arm/sunxi/sun4i_dma.c
--- a/sys/arch/arm/sunxi/sun4i_dma.c    Fri Apr 20 16:37:17 2018 +0000
+++ b/sys/arch/arm/sunxi/sun4i_dma.c    Fri Apr 20 18:04:12 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sun4i_dma.c,v 1.2 2018/04/10 00:59:55 jmcneill Exp $ */
+/* $NetBSD: sun4i_dma.c,v 1.3 2018/04/20 18:04:12 bouyer Exp $ */
 
 /*-
  * Copyright (c) 2017 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -29,7 +29,7 @@
 #include "opt_ddb.h"
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sun4i_dma.c,v 1.2 2018/04/10 00:59:55 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sun4i_dma.c,v 1.3 2018/04/20 18:04:12 bouyer Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -290,11 +290,17 @@
 {
        struct sun4idma_softc *sc = device_private(dev);
        struct sun4idma_channel *ch = priv;
+       uint32_t val;
 
-       if (ch->ch_type == DMA_TYPE_NORMAL)
-               DMA_WRITE(sc, NDMA_CTRL_REG(ch->ch_index), 0);
-       else
-               DMA_WRITE(sc, DDMA_CTRL_REG(ch->ch_index), 0);
+       if (ch->ch_type == DMA_TYPE_NORMAL) {
+               val = DMA_READ(sc, NDMA_CTRL_REG(ch->ch_index));
+               val &= ~NDMA_CTRL_LOAD;
+               DMA_WRITE(sc, NDMA_CTRL_REG(ch->ch_index), val);
+       } else {
+               val = DMA_READ(sc, DDMA_CTRL_REG(ch->ch_index));
+               val &= ~DDMA_CTRL_LOAD;
+               DMA_WRITE(sc, DDMA_CTRL_REG(ch->ch_index), val);
+       }
 }
 
 static const struct fdtbus_dma_controller_func sun4idma_funcs = {