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[src/trunk]: src/sys/arch Revert jdolecek's changes related to FXSAVE. They j...
details: https://anonhg.NetBSD.org/src/rev/af5ede6afaf6
branches: trunk
changeset: 323593:af5ede6afaf6
user: maxv <maxv%NetBSD.org@localhost>
date: Fri Jun 22 06:22:37 2018 +0000
description:
Revert jdolecek's changes related to FXSAVE. They just didn't make any
sense and were trying to hide a real bug, which is, that there is for some
reason a wrong stack alignment that causes FXSAVE to fault in
fpuinit_mxcsr_mask. As seen in current-users@ yesterday, rdi % 16 = 8. And
as seen several months ago, as well.
The rest of the changes in XSAVE are wrong too, but I'll let him fix these
ones.
diffstat:
sys/arch/x86/include/fpu.h | 4 ++--
sys/arch/x86/x86/cpu.c | 6 +++---
sys/arch/x86/x86/fpu.c | 16 +++++++---------
sys/arch/xen/x86/cpu.c | 7 +++----
4 files changed, 15 insertions(+), 18 deletions(-)
diffs (118 lines):
diff -r 55d6c90eb4fd -r af5ede6afaf6 sys/arch/x86/include/fpu.h
--- a/sys/arch/x86/include/fpu.h Fri Jun 22 04:41:57 2018 +0000
+++ b/sys/arch/x86/include/fpu.h Fri Jun 22 06:22:37 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu.h,v 1.11 2018/06/20 20:43:20 jdolecek Exp $ */
+/* $NetBSD: fpu.h,v 1.12 2018/06/22 06:22:37 maxv Exp $ */
#ifndef _X86_FPU_H_
#define _X86_FPU_H_
@@ -12,7 +12,7 @@
struct trapframe;
void fpuinit(struct cpu_info *);
-void fpuinit_mxcsr_mask(bool);
+void fpuinit_mxcsr_mask(void);
void fpusave_lwp(struct lwp *, bool);
void fpusave_cpu(bool);
diff -r 55d6c90eb4fd -r af5ede6afaf6 sys/arch/x86/x86/cpu.c
--- a/sys/arch/x86/x86/cpu.c Fri Jun 22 04:41:57 2018 +0000
+++ b/sys/arch/x86/x86/cpu.c Fri Jun 22 06:22:37 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.157 2018/06/20 20:43:21 jdolecek Exp $ */
+/* $NetBSD: cpu.c,v 1.158 2018/06/22 06:22:37 maxv Exp $ */
/*
* Copyright (c) 2000-2012 NetBSD Foundation, Inc.
@@ -62,7 +62,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.157 2018/06/20 20:43:21 jdolecek Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.158 2018/06/22 06:22:37 maxv Exp $");
#include "opt_ddb.h"
#include "opt_mpbios.h" /* for MPDEBUG */
@@ -638,7 +638,7 @@
}
if (x86_fpu_save >= FPU_SAVE_FXSAVE) {
- fpuinit_mxcsr_mask(true);
+ fpuinit_mxcsr_mask();
}
/* If xsave is enabled, enable all fpu features */
diff -r 55d6c90eb4fd -r af5ede6afaf6 sys/arch/x86/x86/fpu.c
--- a/sys/arch/x86/x86/fpu.c Fri Jun 22 04:41:57 2018 +0000
+++ b/sys/arch/x86/x86/fpu.c Fri Jun 22 06:22:37 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu.c,v 1.41 2018/06/20 20:43:21 jdolecek Exp $ */
+/* $NetBSD: fpu.c,v 1.42 2018/06/22 06:22:37 maxv Exp $ */
/*
* Copyright (c) 2008 The NetBSD Foundation, Inc. All
@@ -96,7 +96,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.41 2018/06/20 20:43:21 jdolecek Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.42 2018/06/22 06:22:37 maxv Exp $");
#include "opt_multiprocessor.h"
@@ -237,14 +237,9 @@
* Get the value of MXCSR_MASK supported by the CPU.
*/
void
-fpuinit_mxcsr_mask(bool has_fxsave)
+fpuinit_mxcsr_mask(void)
{
-
- if (!has_fxsave) {
- x86_fpu_mxcsr_mask = __INITIAL_MXCSR_MASK__;
- return;
- }
-
+#ifndef XEN
union savefpu fpusave __aligned(16);
u_long psl;
@@ -267,6 +262,9 @@
} else {
x86_fpu_mxcsr_mask = fpusave.sv_xmm.fx_mxcsr_mask;
}
+#else
+ x86_fpu_mxcsr_mask = __INITIAL_MXCSR_MASK__;
+#endif
}
static void
diff -r 55d6c90eb4fd -r af5ede6afaf6 sys/arch/xen/x86/cpu.c
--- a/sys/arch/xen/x86/cpu.c Fri Jun 22 04:41:57 2018 +0000
+++ b/sys/arch/xen/x86/cpu.c Fri Jun 22 06:22:37 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.119 2018/06/20 20:43:20 jdolecek Exp $ */
+/* $NetBSD: cpu.c,v 1.120 2018/06/22 06:22:37 maxv Exp $ */
/*-
* Copyright (c) 2000 The NetBSD Foundation, Inc.
@@ -65,7 +65,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.119 2018/06/20 20:43:20 jdolecek Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.120 2018/06/22 06:22:37 maxv Exp $");
#include "opt_ddb.h"
#include "opt_multiprocessor.h"
@@ -564,8 +564,7 @@
}
if (x86_fpu_save >= FPU_SAVE_FXSAVE) {
- /* XXX fxsave() faults on Xen with no-xsave flag, why? */
- fpuinit_mxcsr_mask((cr4 & CR4_OSXSAVE) != 0);
+ fpuinit_mxcsr_mask();
}
/*
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