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[src/trunk]: src/sys/arch/arm/rockchip Use syscon API
details: https://anonhg.NetBSD.org/src/rev/cd48a349ff48
branches: trunk
changeset: 324368:cd48a349ff48
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Sat Jun 30 18:07:32 2018 +0000
description:
Use syscon API
diffstat:
sys/arch/arm/rockchip/rk_iomux.c | 41 ++++++++++++-----------------
sys/arch/arm/rockchip/rk_usb.c | 56 ++++++++++++++++++---------------------
2 files changed, 43 insertions(+), 54 deletions(-)
diffs (228 lines):
diff -r ce14beb1733f -r cd48a349ff48 sys/arch/arm/rockchip/rk_iomux.c
--- a/sys/arch/arm/rockchip/rk_iomux.c Sat Jun 30 18:07:12 2018 +0000
+++ b/sys/arch/arm/rockchip/rk_iomux.c Sat Jun 30 18:07:32 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_iomux.c,v 1.2 2018/06/16 23:13:29 jmcneill Exp $ */
+/* $NetBSD: rk_iomux.c,v 1.3 2018/06/30 18:15:55 jmcneill Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: rk_iomux.c,v 1.2 2018/06/16 23:13:29 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk_iomux.c,v 1.3 2018/06/30 18:15:55 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -39,6 +39,7 @@
#include <sys/lwp.h>
#include <dev/fdt/fdtvar.h>
+#include <dev/fdt/syscon.h>
#define GRF_GPIO_P_REG(_bank, _idx) (0x0100 + (_bank) * 0x10 + ((_idx) >> 3) * 4)
#define GRF_GPIO_P_CTL(_idx) (0x3 << (((_idx) & 7) * 2))
@@ -123,16 +124,19 @@
struct rk_iomux_softc {
device_t sc_dev;
- bus_space_tag_t sc_bst;
- bus_space_handle_t sc_bsh;
+ struct syscon *sc_syscon;
const struct rk_iomux_config *sc_conf;
};
-#define RD4(sc, reg) \
- bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg))
-#define WR4(sc, reg, val) \
- bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
+#define LOCK(sc) \
+ syscon_lock((sc)->sc_syscon)
+#define UNLOCK(sc) \
+ syscon_unlock((sc)->sc_syscon)
+#define RD4(sc, reg) \
+ syscon_read_4((sc)->sc_syscon, (reg))
+#define WR4(sc, reg, val) \
+ syscon_write_4((sc)->sc_syscon, (reg), (val))
static int rk_iomux_match(device_t, cfdata_t, void *);
static void rk_iomux_attach(device_t, device_t, void *);
@@ -250,7 +254,9 @@
const u_int mux = be32toh(pins[2]);
const int cfg = fdtbus_get_phandle_from_native(be32toh(pins[3]));
+ LOCK(sc);
rk_iomux_config(sc, cfg, bank, idx, mux);
+ UNLOCK(sc);
pins_len -= 16;
pins += 4;
@@ -277,25 +283,12 @@
struct rk_iomux_softc * const sc = device_private(self);
struct fdt_attach_args * const faa = aux;
const int phandle = faa->faa_phandle;
- bus_addr_t addr;
- bus_size_t size;
int child, sub;
- const int grf_phandle = fdtbus_get_phandle(phandle, "rockchip,grf");
- if (grf_phandle == -1) {
- aprint_error(": couldn't get grf phandle\n");
- return;
- }
-
- if (fdtbus_get_reg(grf_phandle, 0, &addr, &size) != 0) {
- aprint_error(": couldn't get grf registers\n");
- return;
- }
-
sc->sc_dev = self;
- sc->sc_bst = faa->faa_bst;
- if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) {
- aprint_error(": couldn't map registers\n");
+ sc->sc_syscon = fdtbus_syscon_acquire(phandle, "rockchip,grf");
+ if (sc->sc_syscon == NULL) {
+ aprint_error(": couldn't acquire grf syscon\n");
return;
}
sc->sc_conf = (void *)of_search_compatible(phandle, compat_data)->data;
diff -r ce14beb1733f -r cd48a349ff48 sys/arch/arm/rockchip/rk_usb.c
--- a/sys/arch/arm/rockchip/rk_usb.c Sat Jun 30 18:07:12 2018 +0000
+++ b/sys/arch/arm/rockchip/rk_usb.c Sat Jun 30 18:07:32 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_usb.c,v 1.2 2018/06/20 20:12:51 jmcneill Exp $ */
+/* $NetBSD: rk_usb.c,v 1.3 2018/06/30 18:07:32 jmcneill Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -28,7 +28,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: rk_usb.c,v 1.2 2018/06/20 20:12:51 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk_usb.c,v 1.3 2018/06/30 18:07:32 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -41,13 +41,14 @@
#include <dev/clk/clk_backend.h>
#include <dev/fdt/fdtvar.h>
+#include <dev/fdt/syscon.h>
static int rk_usb_match(device_t, cfdata_t, void *);
static void rk_usb_attach(device_t, device_t, void *);
-#define CON0_REG 0x00
-#define CON1_REG 0x04
-#define CON2_REG 0x08
+#define CON0_REG 0x100
+#define CON1_REG 0x104
+#define CON2_REG 0x108
#define USBPHY_COMMONONN __BIT(4)
enum rk_usb_type {
@@ -61,24 +62,17 @@
struct rk_usb_clk {
struct clk base;
- bus_size_t reg;
};
struct rk_usb_softc {
device_t sc_dev;
- bus_space_tag_t sc_bst;
- bus_space_handle_t sc_bsh;
+ struct syscon *sc_syscon;
enum rk_usb_type sc_type;
struct clk_domain sc_clkdom;
struct rk_usb_clk sc_usbclk;
};
-#define USB_READ(sc, reg) \
- bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg))
-#define USB_WRITE(sc, reg, val) \
- bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
-
CFATTACH_DECL_NEW(rk_usb, sizeof(struct rk_usb_softc),
rk_usb_match, rk_usb_attach, NULL, NULL);
@@ -111,7 +105,10 @@
const uint32_t write_mask = USBPHY_COMMONONN << 16;
const uint32_t write_val = 0;
- USB_WRITE(sc, CON2_REG, write_mask | write_val);
+
+ syscon_lock(sc->sc_syscon);
+ syscon_write_4(sc->sc_syscon, CON2_REG, write_mask | write_val);
+ syscon_unlock(sc->sc_syscon);
return 0;
}
@@ -123,7 +120,10 @@
const uint32_t write_mask = USBPHY_COMMONONN << 16;
const uint32_t write_val = USBPHY_COMMONONN;
- USB_WRITE(sc, CON2_REG, write_mask | write_val);
+
+ syscon_lock(sc->sc_syscon);
+ syscon_write_4(sc->sc_syscon, CON2_REG, write_mask | write_val);
+ syscon_unlock(sc->sc_syscon);
return 0;
}
@@ -165,23 +165,13 @@
struct rk_usb_softc * const sc = device_private(self);
struct fdt_attach_args * const faa = aux;
const int phandle = faa->faa_phandle;
- bus_addr_t grf_addr, phy_addr, phy_size;
int child;
sc->sc_dev = self;
- sc->sc_bst = faa->faa_bst;
sc->sc_type = of_search_compatible(phandle, compat_data)->data;
-
- if (fdtbus_get_reg(OF_parent(phandle), 0, &grf_addr, NULL) != 0) {
- aprint_error(": couldn't get grf registers\n");
- return;
- }
- if (fdtbus_get_reg(phandle, 0, &phy_addr, &phy_size) != 0) {
- aprint_error(": couldn't get phy registers\n");
- return;
- }
- if (bus_space_map(sc->sc_bst, grf_addr + phy_addr, phy_size, 0, &sc->sc_bsh) != 0) {
- aprint_error(": couldn't map phy registers\n");
+ sc->sc_syscon = fdtbus_syscon_lookup(OF_parent(phandle));
+ if (sc->sc_syscon == NULL) {
+ aprint_error(": couldn't get grf syscon\n");
return;
}
@@ -252,7 +242,10 @@
const uint32_t write_mask = 0x1ffU << 16;
const uint32_t write_val = enable ? 0 : 0x1d1;
- USB_WRITE(usb_sc, CON0_REG, write_mask | write_val);
+
+ syscon_lock(usb_sc->sc_syscon);
+ syscon_write_4(usb_sc->sc_syscon, CON0_REG, write_mask | write_val);
+ syscon_unlock(usb_sc->sc_syscon);
return 0;
}
@@ -264,7 +257,10 @@
const uint32_t write_mask = 0x1ffU << 16;
const uint32_t write_val = enable ? 0 : 0x1d1;
- USB_WRITE(usb_sc, CON1_REG, write_mask | write_val);
+
+ syscon_lock(usb_sc->sc_syscon);
+ syscon_write_4(usb_sc->sc_syscon, CON1_REG, write_mask | write_val);
+ syscon_unlock(usb_sc->sc_syscon);
return 0;
}
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