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[src/trunk]: src/sys/arch/arm/include/arm32 When restoring SPRSR, use spsr_fs...
details: https://anonhg.NetBSD.org/src/rev/dbabdaef2d1c
branches: trunk
changeset: 325359:dbabdaef2d1c
user: matt <matt%NetBSD.org@localhost>
date: Fri Dec 20 07:01:06 2013 +0000
description:
When restoring SPRSR, use spsr_fsxc not spsr_all so bits[23-8] are restored.
This should fix use of simd instructions that rely on the GE bits.
diffstat:
sys/arch/arm/include/arm32/frame.h | 8 ++++----
1 files changed, 4 insertions(+), 4 deletions(-)
diffs (36 lines):
diff -r 13de5e047291 -r dbabdaef2d1c sys/arch/arm/include/arm32/frame.h
--- a/sys/arch/arm/include/arm32/frame.h Fri Dec 20 06:50:28 2013 +0000
+++ b/sys/arch/arm/include/arm32/frame.h Fri Dec 20 07:01:06 2013 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: frame.h,v 1.37 2013/12/02 18:36:10 joerg Exp $ */
+/* $NetBSD: frame.h,v 1.38 2013/12/20 07:01:06 matt Exp $ */
/*
* Copyright (c) 1994-1997 Mark Brinicombe.
@@ -411,7 +411,7 @@
#define PULLFRAME \
ldr r0, [sp], #TF_R0; /* Pop the SPSR from stack */ \
- msr spsr_all, r0; \
+ msr spsr_fsxc, r0; \
ldmia sp, {r0-r14}^; /* Restore registers (usr mode) */ \
mov r0, r0; /* NOP for previous instruction */ \
add sp, sp, #(TF_PC-TF_R0); /* Adjust the stack pointer */ \
@@ -464,7 +464,7 @@
str r0, [r2, #-4]!; /* Push return address */ \
stmdb r2!, {sp, lr}; /* Push SVC sp, lr */ \
mov sp, r2; /* Keep stack aligned */ \
- msr spsr_all, r3; /* Restore correct spsr */ \
+ msr spsr_fsxc, r3; /* Restore correct spsr */ \
ldmdb r1, {r0-r3}; /* Restore 4 regs from xxx mode */ \
sub sp, sp, #(TF_SVC_SP-TF_R0); /* Adjust the stack pointer */ \
PUSHUSERREGS; /* Push the user mode registers */ \
@@ -481,7 +481,7 @@
#define PULLFRAMEFROMSVCANDEXIT \
ldr r0, [sp], #0x0008; /* Pop the SPSR from stack */ \
- msr spsr_all, r0; /* restore SPSR */ \
+ msr spsr_fsxc, r0; /* restore SPSR */ \
ldmia sp, {r0-r14}^; /* Restore registers (usr mode) */ \
mov r0, r0; /* NOP for previous instruction */ \
add sp, sp, #(TF_SVC_SP-TF_R0); /* Adjust the stack pointer */ \
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