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[src/trunk]: src/sys/dev/pci Fix a bug that EG20T's UARTs from #1 to #3 never...
details: https://anonhg.NetBSD.org/src/rev/bab7f7e7be09
branches: trunk
changeset: 326132:bab7f7e7be09
user: msaitoh <msaitoh%NetBSD.org@localhost>
date: Mon Jan 20 01:10:38 2014 +0000
description:
Fix a bug that EG20T's UARTs from #1 to #3 never match.
Tested with my MinnowBoard.
diffstat:
sys/dev/pci/pucdata.c | 10 +++++-----
1 files changed, 5 insertions(+), 5 deletions(-)
diffs (45 lines):
diff -r fe0e893e57f8 -r bab7f7e7be09 sys/dev/pci/pucdata.c
--- a/sys/dev/pci/pucdata.c Mon Jan 20 00:05:57 2014 +0000
+++ b/sys/dev/pci/pucdata.c Mon Jan 20 01:10:38 2014 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pucdata.c,v 1.89 2013/12/25 16:05:59 msaitoh Exp $ */
+/* $NetBSD: pucdata.c,v 1.90 2014/01/20 01:10:38 msaitoh Exp $ */
/*
* Copyright (c) 1998, 1999 Christopher G. Demetriou. All rights reserved.
@@ -36,7 +36,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pucdata.c,v 1.89 2013/12/25 16:05:59 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pucdata.c,v 1.90 2014/01/20 01:10:38 msaitoh Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -1852,7 +1852,7 @@
/* Intel EG20T UART */
{ "Intel EG20T UART #1",
- { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_UART_1, 0, 1 },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_UART_1, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
@@ -1861,7 +1861,7 @@
/* Intel EG20T UART */
{ "Intel EG20T UART #2",
- { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_UART_2, 0, 2 },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_UART_2, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
@@ -1870,7 +1870,7 @@
/* Intel EG20T UART */
{ "Intel EG20T UART #3",
- { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_UART_3, 0, 3 },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_UART_3, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
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