[src/trunk]: src/sys/arch/arm/omap Add some more OMAP5 stuff.

[matt <matt%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/4ab365712975
branches:  trunk
changeset: 328448:4ab365712975
user:      matt <matt%NetBSD.org@localhost>
date:      Thu Apr 03 17:11:10 2014 +0000

description:
Add some more OMAP5 stuff.
Consistently use upper case hex.

diffstat:

 sys/arch/arm/omap/omap2_reg.h |  60 ++++++++++++++++++++++++++++++++++++------
 1 files changed, 51 insertions(+), 9 deletions(-)

diffs (109 lines):

diff -r 134719cd594f -r 4ab365712975 sys/arch/arm/omap/omap2_reg.h
--- a/sys/arch/arm/omap/omap2_reg.h     Thu Apr 03 17:09:48 2014 +0000
+++ b/sys/arch/arm/omap/omap2_reg.h     Thu Apr 03 17:11:10 2014 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: omap2_reg.h,v 1.25 2014/04/03 17:09:48 matt Exp $ */
+/* $NetBSD: omap2_reg.h,v 1.26 2014/04/03 17:11:10 matt Exp $ */
 
 /*
  * Copyright (c) 2007 Microsoft
@@ -56,7 +56,7 @@
 /* OMAP3 processors */
 
 #define        OMAP3430_L4_WAKEUP_BASE         0x48300000
-#define        OMAP3430_L4_WAKEUP_SIZE         0x00040000      /* 256KB */
+#define        OMAP3430_L4_WAKEUP_SIZE         0x00100000      /* 256KB padded to 1M */
 
 #define        OMAP3430_L4_PERIPHERAL_BASE     0x49000000
 #define        OMAP3430_L4_PERIPHERAL_SIZE     0x00100000      /* 1MB */
@@ -65,7 +65,7 @@
 #define        OMAP3430_L4_EMULATION_SIZE      0x00800000      /* 8MB */
 
 #define        OMAP3530_L4_WAKEUP_BASE         0x48300000
-#define        OMAP3530_L4_WAKEUP_SIZE         0x00040000      /* 256KB */
+#define        OMAP3530_L4_WAKEUP_SIZE         0x00100000      /* 256KB padded to 1M */
 
 #define        OMAP3530_L4_PERIPHERAL_BASE     0x49000000
 #define        OMAP3530_L4_PERIPHERAL_SIZE     0x00100000      /* 1MB */
@@ -79,7 +79,7 @@
 #define        OMAP4430_L4_CORE_SIZE           0x01000000      /* 16MB - CFG */
 
 #define        OMAP4430_L4_WAKEUP_BASE         0x4A300000
-#define        OMAP4430_L4_WAKEUP_SIZE         0x00040000      /* 256KB */
+#define        OMAP4430_L4_WAKEUP_SIZE         0x00100000      /* 256KB padded to 1M */
 
 #define        OMAP4430_L4_PERIPHERAL_BASE     0x48000000
 #define        OMAP4430_L4_PERIPHERAL_SIZE     0x01000000      /* 16MB */
@@ -744,7 +744,7 @@
 #define        GPIO5_BASE_4430                 0x4805b000
 #define        GPIO6_BASE_4430                 0x4805d000
 
-#define        GPIO1_BASE_5430                 0x4ae10000
+#define        GPIO1_BASE_5430                 0x4AE10000
 #define        GPIO2_BASE_5430                 0x48055000
 #define        GPIO3_BASE_5430                 0x48057000
 #define        GPIO4_BASE_5430                 0x48059000
@@ -753,10 +753,10 @@
 #define        GPIO7_BASE_5430                 0x48051000
 #define        GPIO8_BASE_5430                 0x48053000
 
-#define        GPIO0_BASE_TI_AM335X            0x44e07000
-#define        GPIO1_BASE_TI_AM335X            0x4804c000
-#define        GPIO2_BASE_TI_AM335X            0x481ac000
-#define        GPIO3_BASE_TI_AM335X            0x481ae000
+#define        GPIO0_BASE_TI_AM335X            0x44E07000
+#define        GPIO1_BASE_TI_AM335X            0x4804C000
+#define        GPIO2_BASE_TI_AM335X            0x481AC000
+#define        GPIO3_BASE_TI_AM335X            0x481AE000
 
 #define        GPIO1_BASE_TI_DM37XX            0x48310000
 #define        GPIO2_BASE_TI_DM37XX            0x49050000
@@ -844,6 +844,48 @@
 #define         PRM_FRAC_INCR_DENUM_RELOAD     __BIT(16)
 #define         PRM_FRAC_INCR_DENUM_DENOMINATOR        __BITS(11,0)
 #define        OMAP5_GTIMER_FREQ               6144000         /* 6.144Mhz */
+#define        OMAP5_CM_CTL_WKUP_LLIA_WAKEREQIN_LLIBWAKEREQIN \
+                                       0x4AE0C840
+#define        OMAP5_CM_CTL_WKUP_DRM_EMU0_DRM_EMU1 \
+                                       0x4AE0C844
+#define        OMAP5_CM_CTL_WKUP_JTAG_NTRST_JTAG_TCK \
+                                       0x4AE0C848
+#define        OMAP5_CM_CTL_WKUP_JTAG_TDI_JTAG_TMSC \
+                                       0x4AE0C84C
+#define        OMAP5_CM_CTL_WKUP_JTAG_TDI_JTAG_TDO \
+                                       0x4AE0C850
+#define        OMAP5_CM_CTL_WKUP_SYS_32K_FREQ_CLK_IOREG \
+                                       0x4AE0C854
+#define        OMAP5_CM_CTL_WKUP_REF_CLK0_OUT_REF_CLK1_OUT \
+                                       0x4AE0C858
+#define        OMAP5_CM_CTL_WKUP_WAKEUPEVENT1  __BIT(31)
+#define        OMAP5_CM_CTL_WKUP_WAKEUPENABLE1 __BIT(30)
+#define        OMAP5_CM_CTL_WKUP_INPUT_ENABLE1 __BIT(24)
+#define        OMAP5_CM_CTL_WKUP_PWRDOWN1      __BIT(21)
+#define        OMAP5_CM_CTL_WKUP_PULLTYPEUP1   __BIT(20)
+#define        OMAP5_CM_CTL_WKUP_PULLUDENABLE1 __BIT(19)
+#define        OMAP5_CM_CTL_WKUP_MUXMODE1      __BITS(18,16)
+#define        OMAP5_CM_CTL_WKUP_WAKEUPEVENT0  __BIT(15)
+#define        OMAP5_CM_CTL_WKUP_WAKEUPENABLE0 __BIT(14)
+#define        OMAP5_CM_CTL_WKUP_INPUT_ENABLE0 __BIT(8)
+#define        OMAP5_CM_CTL_WKUP_PWRDOWN0      __BIT(5)
+#define        OMAP5_CM_CTL_WKUP_PULLTYPEUP0   __BIT(4)
+#define        OMAP5_CM_CTL_WKUP_PULLUDENABLE0 __BIT(3)
+#define        OMAP5_CM_CTL_WKUP_MUXMODE0      __BITS(2,0)
+
+#define        OMAP5_CM_CTL_WKUP_MUXMODE1_REF_CLK1_OUT         0
+#define        OMAP5_CM_CTL_WKUP_MUXMODE1_HW_WKDBG5            5
+#define        OMAP5_CM_CTL_WKUP_MUXMODE1_GPIO_WK11            6
+#define        OMAP5_CM_CTL_WKUP_MUXMODE1_SAFE_MODE_WAKEUP12   7
+
+#define        OMAP5_CM_L3INIT_MMC1_CLKCTRL            0x4a009628
+#define        OMAP5_CM_L3INIT_MMC2_CLKCTRL            0x4a009630
+#define        OMAP5_CM_L3INIT_HSI_CLKCTRL             0x4a009638
+#define        OMAP5_CM_L3INIT_USB_HOST_HS_CLKCTRL     0x4a009658
+#define        OMAP5_CM_L3INIT_SATA_CLKCTRL            0x4a009688
+
+#define        OMAP5_CM_L3INIT_MODE                    __BITS(0,1)
+#define        OMAP5_CM_L3INIT_ENABLE                  2
 
 #ifdef TI_AM335X
 #define        TI_AM335X_CTLMOD_BASE           0x44e10000