[src/trunk]: src/sys/arch/arm whitespace cleanup

[matt <matt%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/8b92164e91d4
branches:  trunk
changeset: 328646:8b92164e91d4
user:      matt <matt%NetBSD.org@localhost>
date:      Fri Apr 11 16:32:12 2014 +0000

description:
whitespace cleanup

diffstat:

 sys/arch/arm/allwinner/awin_board.c |   6 +++---
 sys/arch/arm/arm32/locore.S         |   8 ++++----
 sys/arch/arm/cortex/a9_mpsubr.S     |  14 +++++++-------
 3 files changed, 14 insertions(+), 14 deletions(-)

diffs (119 lines):

diff -r 9014a7b5186d -r 8b92164e91d4 sys/arch/arm/allwinner/awin_board.c
--- a/sys/arch/arm/allwinner/awin_board.c       Fri Apr 11 15:56:09 2014 +0000
+++ b/sys/arch/arm/allwinner/awin_board.c       Fri Apr 11 16:32:12 2014 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: awin_board.c,v 1.13 2014/04/11 03:10:13 matt Exp $     */
+/*     $NetBSD: awin_board.c,v 1.14 2014/04/11 16:32:38 matt Exp $     */
 /*-
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -34,7 +34,7 @@
 
 #include <sys/cdefs.h>
 
-__KERNEL_RCSID(1, "$NetBSD: awin_board.c,v 1.13 2014/04/11 03:10:13 matt Exp $");
+__KERNEL_RCSID(1, "$NetBSD: awin_board.c,v 1.14 2014/04/11 16:32:38 matt Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -224,7 +224,7 @@
 }
 #endif
 
-psize_t 
+psize_t
 awin_memprobe(void)
 {
        const uint32_t dcr = bus_space_read_4(&awin_bs_tag, awin_core_bsh,
diff -r 9014a7b5186d -r 8b92164e91d4 sys/arch/arm/arm32/locore.S
--- a/sys/arch/arm/arm32/locore.S       Fri Apr 11 15:56:09 2014 +0000
+++ b/sys/arch/arm/arm32/locore.S       Fri Apr 11 16:32:12 2014 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: locore.S,v 1.35 2013/12/17 01:27:21 joerg Exp $        */
+/*     $NetBSD: locore.S,v 1.36 2014/04/11 16:34:29 matt Exp $ */
 
 /*
  * Copyright (C) 1994-1997 Mark Brinicombe
@@ -40,7 +40,7 @@
 /* What size should this really be ? It is only used by init_arm() */
 #define INIT_ARM_STACK_SIZE    2048
 
-       RCSID("$NetBSD: locore.S,v 1.35 2013/12/17 01:27:21 joerg Exp $")
+       RCSID("$NetBSD: locore.S,v 1.36 2014/04/11 16:34:29 matt Exp $")
 
 /*
  * This is for kvm_mkdb, and should be the address of the beginning
@@ -123,8 +123,8 @@
 
 #ifndef OFW
        /* OFW based systems will used OF_boot() */
-       
-.Lcpufuncs:    
+
+.Lcpufuncs:
        .word   _C_LABEL(cpufuncs)
 
 ENTRY_NP(cpu_reset)
diff -r 9014a7b5186d -r 8b92164e91d4 sys/arch/arm/cortex/a9_mpsubr.S
--- a/sys/arch/arm/cortex/a9_mpsubr.S   Fri Apr 11 15:56:09 2014 +0000
+++ b/sys/arch/arm/cortex/a9_mpsubr.S   Fri Apr 11 16:32:12 2014 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: a9_mpsubr.S,v 1.16 2014/04/11 02:37:45 matt Exp $      */
+/*     $NetBSD: a9_mpsubr.S,v 1.17 2014/04/11 16:32:12 matt Exp $      */
 /*-
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -103,7 +103,7 @@
        // Do we need add sharing for this?
        tst     pa, #(L1_S_C|L1_S_B)    // is this entry cacheable?
        orrne   pa, pa, attr            // add sharing
-       
+
 4:     cmp     n_sec, #0
        bne     2b
        bx      lr                      // return
@@ -135,7 +135,7 @@
 #define CPU_CONTROL_AFLT_ENABLE_SET    CPU_CONTROL_AFLT_ENABLE
 #endif
 
-// bits to set in the Control Register 
+// bits to set in the Control Register
 //
 #define CPU_CONTROL_SET \
        (CPU_CONTROL_MMU_ENABLE         |       \
@@ -147,7 +147,7 @@
         CPU_CONTROL_EX_BEND_SET        |       \
         CPU_CONTROL_UNAL_ENABLE)
 
-// bits to clear in the Control Register 
+// bits to clear in the Control Register
 //
 #define CPU_CONTROL_CLR \
        (CPU_CONTROL_AFLT_ENABLE_CLR)
@@ -156,7 +156,7 @@
        // Because the MMU may already be on do a typical sequence to set
        // the Translation Table Base(s).
        mov     ip, lr
-       mov     r10, r0                 // save TTBR 
+       mov     r10, r0                 // save TTBR
        mov     r1, #0
 
        mcr     p15, 0, r1, c7, c5, 0   // invalidate I cache
@@ -199,7 +199,7 @@
 
        XPUTC(#72)
 #if defined(ARM_MMU_EXTENDED)
-       XPUTC(#49)            
+       XPUTC(#49)
        mov     r1, #TTBCR_S_N_1        // make sure TTBCR_S_N is 1
 #else
        XPUTC(#48)
@@ -301,7 +301,7 @@
 #endif
 
        mov     r2, #TIMO
-3:     
+3:
 #if COM_MULT == 1
        ldrb    r1, [r3, #(COM_LSR*COM_MULT)]
 #else