[src/trunk]: src/sys/arch/arm/samsung Both Exynos4 and Exynos5 have a 24 Mhz ...

[reinoud <reinoud%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/cc08da6495db
branches:  trunk
changeset: 329126:cc08da6495db
user:      reinoud <reinoud%NetBSD.org@localhost>
date:      Fri May 09 22:16:56 2014 +0000

description:
Both Exynos4 and Exynos5 have a 24 Mhz external crystal that gets pumped up to
the required frequencies by PLL circuits.

USB freq. seems to be tied directly to this freq.

diffstat:

 sys/arch/arm/samsung/exynos_reg.h |  5 ++++-
 1 files changed, 4 insertions(+), 1 deletions(-)

diffs (15 lines):

diff -r 2d70aafe2254 -r cc08da6495db sys/arch/arm/samsung/exynos_reg.h
--- a/sys/arch/arm/samsung/exynos_reg.h Fri May 09 22:02:10 2014 +0000
+++ b/sys/arch/arm/samsung/exynos_reg.h Fri May 09 22:16:56 2014 +0000
@@ -107,7 +107,10 @@
 /* standard frequency settings */
 #define EXYNOS_ACLK_REF_FREQ           (200*1000*1000) /* 200 Mhz */
 #define EXYNOS_UART_FREQ               (109*1000*1000) /* should be EXYNOS_ACLK_REF_FREQ! */
-#define EXYNOS_USB_FREQ                        (24*1000*1000)  /* 24 Mhz */
+
+#define EXYNOS_F_IN_FREQ               (24*1000*1000)  /* 24 Mhz */
+#define EXYNOS_USB_FREQ                        EXYNOS_F_IN_FREQ/* 24 Mhz */
+
 
 /* Watchdog register definitions */
 #define EXYNOS_WDT_WTCON               0x0000