[src/trunk]: src/sys/dev/pci - Add some register definition for MSI and MSI-X

[msaitoh <msaitoh%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/a6484c70a204
branches:  trunk
changeset: 329509:a6484c70a204
user:      msaitoh <msaitoh%NetBSD.org@localhost>
date:      Tue May 27 16:26:15 2014 +0000

description:
- Add some register definition for MSI and MSI-X
- print MSI-X capability

diffstat:

 sys/dev/pci/pci_subr.c |  34 ++++++++++++++++++++++++++++++----
 sys/dev/pci/pcireg.h   |   7 ++++++-
 2 files changed, 36 insertions(+), 5 deletions(-)

diffs (116 lines):

diff -r 5cf700a0a1f3 -r a6484c70a204 sys/dev/pci/pci_subr.c
--- a/sys/dev/pci/pci_subr.c    Tue May 27 16:17:55 2014 +0000
+++ b/sys/dev/pci/pci_subr.c    Tue May 27 16:26:15 2014 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pci_subr.c,v 1.119 2014/05/25 14:56:46 njoly Exp $     */
+/*     $NetBSD: pci_subr.c,v 1.120 2014/05/27 16:26:15 msaitoh Exp $   */
 
 /*
  * Copyright (c) 1997 Zubin D. Dittia.  All rights reserved.
@@ -40,7 +40,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.119 2014/05/25 14:56:46 njoly Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.120 2014/05/27 16:26:15 msaitoh Exp $");
 
 #ifdef _KERNEL_OPT
 #include "opt_pci.h"
@@ -1690,7 +1690,30 @@
        /* Slot Status 2 */
 }
 
-/* XXX pci_conf_print_msix_cap */
+static void
+pci_conf_print_msix_cap(const pcireg_t *regs, int capoff)
+{
+       pcireg_t reg;
+
+       printf("\n  MSI-X Capability Register\n");
+
+       reg = regs[o2i(capoff + PCI_MSIX_CTL)];
+       printf("    Message Control register: 0x%04x\n",
+           (reg >> 16) & 0xff);
+       printf("      Table Size: %d\n",PCI_MSIX_CTL_TBLSIZE(reg));
+       onoff("Function Mask", reg, PCI_MSIX_CTL_FUNCMASK);
+       onoff("MSI-X Enable", reg, PCI_MSIX_CTL_ENABLE);
+       reg = regs[o2i(capoff + PCI_MSIX_TBLOFFSET)];
+       printf("    Table offset register: 0x%08x\n", reg);
+       printf("      Table offset: %08x\n", reg & PCI_MSIX_TBLOFFSET_MASK);
+       printf("      BIR: 0x%x\n", reg & PCI_MSIX_TBLBIR_MASK);
+       reg = regs[o2i(capoff + PCI_MSIX_PBAOFFSET)];
+       printf("    Pending bit array register: 0x%08x\n", reg);
+       printf("      Pending bit array offset: %08x\n",
+           reg & PCI_MSIX_PBAOFFSET_MASK);
+       printf("      BIR: 0x%x\n", reg & PCI_MSIX_PBABIR_MASK);
+}
+
 /* XXX pci_conf_print_sata_cap */
 static void
 pci_conf_print_pciaf_cap(const pcireg_t *regs, int capoff)
@@ -1723,6 +1746,7 @@
        int off;
        pcireg_t rval;
        int pcie_off = -1, pcipm_off = -1, msi_off = -1, vendspec_off = -1;
+       int msix_off = -1;
        int debugport_off = -1, subsystem_off = -1, pciaf_off = -1;
 
        for (off = PCI_CAPLIST_PTR(regs[o2i(capoff)]);
@@ -1795,6 +1819,7 @@
                        break;
                case PCI_CAP_MSIX:
                        printf("MSI-X");
+                       msix_off = off;
                        break;
                case PCI_CAP_SATA:
                        printf("SATA");
@@ -1830,7 +1855,8 @@
        /* XXX SECURE */
        if (pcie_off != -1)
                pci_conf_print_pcie_cap(regs, pcie_off);
-       /* XXX MSIX */
+       if (msix_off != -1)
+               pci_conf_print_msix_cap(regs, msix_off);
        /* XXX SATA */
        if (pciaf_off != -1)
                pci_conf_print_pciaf_cap(regs, pciaf_off);
diff -r 5cf700a0a1f3 -r a6484c70a204 sys/dev/pci/pcireg.h
--- a/sys/dev/pci/pcireg.h      Tue May 27 16:17:55 2014 +0000
+++ b/sys/dev/pci/pcireg.h      Tue May 27 16:26:15 2014 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pcireg.h,v 1.92 2014/05/27 16:10:33 msaitoh Exp $      */
+/*     $NetBSD: pcireg.h,v 1.93 2014/05/27 16:26:15 msaitoh Exp $      */
 
 /*
  * Copyright (c) 1995, 1996, 1999, 2000
@@ -618,6 +618,8 @@
 #define        PCI_MSI_MDATA64         0xC     /* 64-bit Message Data Register
                                         * offset
                                         */
+#define        PCI_MSI_MASK            0x10    /* Vector Mask register */
+#define        PCI_MSI_PENDING         0x14    /* Vector Pending register */
 
 #define        PCI_MSI_CTL_MASK        __BITS(31, 16)
 #define        PCI_MSI_CTL_PERVEC_MASK __SHIFTIN(__BIT(8), PCI_MSI_CTL_MASK)
@@ -940,6 +942,7 @@
  * MSIX
  */
 
+#define PCI_MSIX_CTL   0x00
 #define        PCI_MSIX_CTL_ENABLE     0x80000000
 #define        PCI_MSIX_CTL_FUNCMASK   0x40000000
 #define        PCI_MSIX_CTL_TBLSIZE_MASK 0x07ff0000
@@ -949,11 +952,13 @@
 /*
  * 2nd DWORD is the Table Offset
  */
+#define        PCI_MSIX_TBLOFFSET      0x04
 #define        PCI_MSIX_TBLOFFSET_MASK 0xfffffff8
 #define        PCI_MSIX_TBLBIR_MASK    0x00000007
 /*
  * 3rd DWORD is the Pending Bitmap Array Offset
  */
+#define        PCI_MSIX_PBAOFFSET      0x08
 #define        PCI_MSIX_PBAOFFSET_MASK 0xfffffff8
 #define        PCI_MSIX_PBABIR_MASK    0x00000007