[src/trunk]: src/sys/arch/sparc64 sun4v: make tlb_flush_pte() work on sun4v -...

[palle <palle%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/149fbf128a37
branches:  trunk
changeset: 329778:149fbf128a37
user:      palle <palle%NetBSD.org@localhost>
date:      Sun Jun 08 17:33:24 2014 +0000

description:
sun4v: make tlb_flush_pte() work on sun4v - parts from OpenBSD - ok martin@

diffstat:

 sys/arch/sparc64/include/cpu.h        |   10 +-
 sys/arch/sparc64/include/hypervisor.h |   49 +++++++++-
 sys/arch/sparc64/include/trap.h       |   10 +-
 sys/arch/sparc64/sparc64/cache.h      |   28 ++++-
 sys/arch/sparc64/sparc64/cpu.c        |   44 ++++++++-
 sys/arch/sparc64/sparc64/hvcall.S     |  171 ++++++++++++++++-----------------
 sys/arch/sparc64/sparc64/ipifuncs.c   |   65 ++++++++++++-
 sys/arch/sparc64/sparc64/mp_subr.S    |   21 +++-
 8 files changed, 296 insertions(+), 102 deletions(-)

diffs (truncated from 1279 to 300 lines):

diff -r 89a31883beac -r 149fbf128a37 sys/arch/sparc64/include/cpu.h
--- a/sys/arch/sparc64/include/cpu.h    Sun Jun 08 15:24:34 2014 +0000
+++ b/sys/arch/sparc64/include/cpu.h    Sun Jun 08 17:33:24 2014 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpu.h,v 1.110 2014/02/21 18:00:09 palle Exp $ */
+/*     $NetBSD: cpu.h,v 1.111 2014/06/08 17:33:24 palle Exp $ */
 
 /*
  * Copyright (c) 1992, 1993
@@ -180,6 +180,14 @@
         */
        paddr_t                 ci_mmfsa;
 
+       /*
+        * sun4v mondo control fields
+        */
+       paddr_t                 ci_cpumq;  /* cpu mondo queue address */
+       paddr_t                 ci_devmq;  /* device mondo queue address */
+       paddr_t                 ci_cpuset; /* mondo recipient address */ 
+       paddr_t                 ci_mondo;  /* mondo message address */
+       
        /* probe fault in PCI config space reads */
        bool                    ci_pci_probe;
        bool                    ci_pci_fault;
diff -r 89a31883beac -r 149fbf128a37 sys/arch/sparc64/include/hypervisor.h
--- a/sys/arch/sparc64/include/hypervisor.h     Sun Jun 08 15:24:34 2014 +0000
+++ b/sys/arch/sparc64/include/hypervisor.h     Sun Jun 08 17:33:24 2014 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: hypervisor.h,v 1.3 2014/06/05 18:36:44 palle Exp $ */
+/*     $NetBSD: hypervisor.h,v 1.4 2014/06/08 17:33:24 palle Exp $ */
 /*     $OpenBSD: hypervisor.h,v 1.14 2011/06/26 17:23:46 kettenis Exp $        */
 
 /*
@@ -28,32 +28,40 @@
  * API versioning
  */
 
+#ifndef _LOCORE
 int64_t        hv_api_get_version(uint64_t api_group,
            uint64_t *major_number, uint64_t *minor_number);
-
+#endif
 /*
  * Domain services
  */
 
+#ifndef _LOCORE
 int64_t hv_mach_desc(paddr_t buffer, psize_t *length);
+#endif
 
 /*
  * CPU services
  */
 
+#ifndef _LOCORE
 void   hv_cpu_yield(void);
 int64_t        hv_cpu_qconf(uint64_t queue, uint64_t base, uint64_t nentries);
+#endif
 
 #define CPU_MONDO_QUEUE                0x3c
 #define DEVICE_MONDO_QUEUE     0x3d
 
+#ifndef _LOCORE
 int64_t        hv_cpu_mondo_send(uint64_t ncpus, paddr_t cpulist, paddr_t data);
 int64_t        hv_cpu_myid(uint64_t *cpuid);
+#endif
 
 /*
  * MMU services
  */
 
+#ifndef _LOCORE
 int64_t        hv_mmu_demap_page(vaddr_t vaddr, uint64_t context, uint64_t flags);
 int64_t        hv_mmu_demap_ctx(uint64_t context, uint64_t flags);
 int64_t        hv_mmu_demap_all(uint64_t flags);
@@ -62,10 +70,12 @@
 int64_t        hv_mmu_map_addr(vaddr_t vaddr, uint64_t context, uint64_t tte,
            uint64_t flags);
 int64_t        hv_mmu_unmap_addr(vaddr_t vaddr, uint64_t context, uint64_t flags);
+#endif
 
 #define MAP_DTLB       0x1
 #define MAP_ITLB       0x2
 
+#ifndef _LOCORE
 struct tsb_desc {
        uint16_t        td_idxpgsz;
        uint16_t        td_assoc;
@@ -78,18 +88,22 @@
 
 int64_t        hv_mmu_tsb_ctx0(uint64_t ntsb, paddr_t tsbptr);
 int64_t        hv_mmu_tsb_ctxnon0(uint64_t ntsb, paddr_t tsbptr);
+#endif
 
 /*
  * Cache and memory services
  */
 
+#ifndef _LOCORE
 int64_t        hv_mem_scrub(paddr_t raddr, psize_t length);
 int64_t        hv_mem_sync(paddr_t raddr, psize_t length);
+#endif
 
 /*
  * Device interrupt services
  */
 
+#ifndef _LOCORE
 int64_t        hv_intr_devino_to_sysino(uint64_t devhandle, uint64_t devino,
            uint64_t *sysino);
 int64_t        hv_intr_getenabled(uint64_t sysino, uint64_t *intr_enabled);
@@ -98,6 +112,7 @@
 int64_t        hv_intr_setstate(uint64_t sysino, uint64_t intr_state);
 int64_t        hv_intr_gettarget(uint64_t sysino, uint64_t *cpuid);
 int64_t        hv_intr_settarget(uint64_t sysino, uint64_t cpuid);
+#endif
 
 #define INTR_DISABLED  0
 #define INTR_ENABLED   1
@@ -106,6 +121,7 @@
 #define INTR_RECEIVED  1
 #define INTR_DELIVERED 2
 
+#ifndef _LOCORE
 int64_t        hv_vintr_getcookie(uint64_t devhandle, uint64_t devino,
            uint64_t *cookie_value);
 int64_t        hv_vintr_setcookie(uint64_t devhandle, uint64_t devino,
@@ -122,21 +138,26 @@
            uint64_t *cpuid);
 int64_t        hv_vintr_settarget(uint64_t devhandle, uint64_t devino,
            uint64_t cpuid);
+#endif
 
 /*
  * Time of day services
  */
 
+#ifndef _LOCORE
 int64_t        hv_tod_get(uint64_t *tod);
 int64_t        hv_tod_set(uint64_t tod);
+#endif
 
 /*
  * Console services
  */
 
+#ifndef _LOCORE
 int64_t        hv_cons_getchar(int64_t *ch);
 int64_t        hv_cons_putchar(int64_t ch);
 int64_t        hv_api_putchar(int64_t ch);
+#endif
 
 #define CONS_BREAK     -1
 #define CONS_HUP       -2
@@ -145,8 +166,10 @@
  * Domain state services
  */
 
+#ifndef _LOCORE
 int64_t        hv_soft_state_set(uint64_t software_state,
            paddr_t software_description_ptr);
+#endif
 
 #define SIS_NORMAL     0x1
 #define SIS_TRANSITION 0x2
@@ -155,6 +178,7 @@
  * PCI I/O services
  */
 
+#ifndef _LOCORE
 int64_t        hv_pci_iommu_map(uint64_t devhandle, uint64_t tsbid,
            uint64_t nttes, uint64_t io_attributes, paddr_t io_page_list_p,
            uint64_t *nttes_mapped);
@@ -171,6 +195,7 @@
 int64_t        hv_pci_config_put(uint64_t devhandle, uint64_t pci_device,
             uint64_t pci_config_offset, uint64_t size, uint64_t data,
            uint64_t *error_flag);
+#endif
 
 #define PCI_MAP_ATTR_READ  0x01                /* From memory */
 #define PCI_MAP_ATTR_WRITE 0x02                /* To memory */
@@ -179,6 +204,7 @@
  * PCI MSI services
  */
 
+#ifndef _LOCORE
 int64_t hv_pci_msiq_conf(uint64_t devhandle, uint64_t msiqid,
            uint64_t r_addr, uint64_t nentries);
 int64_t hv_pci_msiq_info(uint64_t devhandle, uint64_t msiqid,
@@ -188,18 +214,22 @@
            uint64_t *msiqvalid);
 int64_t hv_pci_msiq_setvalid(uint64_t devhandle, uint64_t msiqid,
            uint64_t msiqvalid);
+#endif
 
 #define PCI_MSIQ_INVALID       0
 #define PCI_MSIQ_VALID         1
 
+#ifndef _LOCORE
 int64_t hv_pci_msiq_getstate(uint64_t devhandle, uint64_t msiqid,
            uint64_t *msiqstate);
 int64_t hv_pci_msiq_setstate(uint64_t devhandle, uint64_t msiqid,
            uint64_t msiqstate);
+#endif
 
 #define PCI_MSIQSTATE_IDLE     0
 #define PCI_MSIQSTATE_ERROR    1
 
+#ifndef _LOCORE
 int64_t hv_pci_msiq_gethead(uint64_t devhandle, uint64_t msiqid,
            uint64_t *msiqhead);
 int64_t hv_pci_msiq_sethead(uint64_t devhandle, uint64_t msiqid,
@@ -211,10 +241,12 @@
            uint64_t *msivalidstate);
 int64_t hv_pci_msi_setvalid(uint64_t devhandle, uint64_t msinum,
            uint64_t msivalidstate);
+#endif
 
 #define PCI_MSI_INVALID                0
 #define PCI_MSI_VALID          1
 
+#ifndef _LOCORE
 int64_t hv_pci_msi_getmsiq(uint64_t devhandle, uint64_t msinum,
            uint64_t *msiqid);
 int64_t hv_pci_msi_setmsiq(uint64_t devhandle, uint64_t msinum,
@@ -224,10 +256,12 @@
            uint64_t *msistate);
 int64_t hv_pci_msi_setstate(uint64_t devhandle, uint64_t msinum,
            uint64_t msistate);
+#endif
 
 #define PCI_MSISTATE_IDLE      0
 #define PCI_MSISTATE_DELIVERED 1
 
+#ifndef _LOCORE
 int64_t hv_pci_msg_getmsiq(uint64_t devhandle, uint64_t msg,
            uint64_t *msiqid);
 int64_t hv_pci_msg_setmsiq(uint64_t devhandle, uint64_t msg,
@@ -237,6 +271,7 @@
            uint64_t *msgvalidstate);
 int64_t hv_pci_msg_setvalid(uint64_t devhandle, uint64_t msg,
            uint64_t msgvalidstate);
+#endif
 
 #define PCIE_MSG_INVALID       0
 #define PCIE_MSG_VALID         1
@@ -251,6 +286,7 @@
  * Logical Domain Channel services
  */
 
+#ifndef _LOCORE
 int64_t hv_ldc_tx_qconf(uint64_t ldc_id, paddr_t base_raddr,
            uint64_t nentries);
 int64_t hv_ldc_tx_qinfo(uint64_t ldc_id, paddr_t *base_raddr,
@@ -265,41 +301,50 @@
 int64_t hv_ldc_rx_get_state(uint64_t ldc_id, uint64_t *head_offset,
            uint64_t *tail_offset, uint64_t *channel_state);
 int64_t hv_ldc_rx_set_qhead(uint64_t ldc_id, uint64_t head_offset);
+#endif
 
 #define LDC_CHANNEL_DOWN       0
 #define LDC_CHANNEL_UP         1
 #define LDC_CHANNEL_RESET      2
 
+#ifndef _LOCORE
 int64_t        hv_ldc_set_map_table(uint64_t ldc_id, paddr_t base_raddr,
            uint64_t nentries);
 int64_t        hv_ldc_get_map_table(uint64_t ldc_id, paddr_t *base_raddr,
            uint64_t *nentries);
 int64_t hv_ldc_copy(uint64_t ldc_id, uint64_t flags, uint64_t cookie,
            paddr_t raddr, psize_t length, psize_t *ret_length);
+#endif
 
 #define LDC_COPY_IN            0
 #define LDC_COPY_OUT           1
 
+#ifndef _LOCORE
 int64_t hv_ldc_mapin(uint64_t ldc_id, uint64_t cookie, paddr_t *raddr,
            uint64_t *perms);
 int64_t hv_ldc_unmap(paddr_t raddr, uint64_t *perms);
+#endif
 
 /*
  * Cryptographic services
  */
 
+#ifndef _LOCORE
 int64_t        hv_rng_get_diag_control(void);
 int64_t        hv_rng_ctl_read(paddr_t raddr, uint64_t *state, uint64_t *delta);
 int64_t        hv_rng_ctl_write(paddr_t raddr, uint64_t state, uint64_t timeout,
        uint64_t *delta);
+#endif
 
 #define RNG_STATE_UNCONFIGURED 0
 #define RNG_STATE_CONFIGURED   1
 #define RNG_STATE_HEALTHCHECK  2
 #define RNG_STATE_ERROR                3
 
+#ifndef _LOCORE
 int64_t        hv_rng_data_read_diag(paddr_t raddr, uint64_t size, uint64_t *delta);