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[src/trunk]: src/sys/arch/arm/allwinner Set BGRA pixel sequence if __ARMEB__ ...
details: https://anonhg.NetBSD.org/src/rev/c44d00cd648f
branches: trunk
changeset: 334823:c44d00cd648f
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Mon Dec 08 10:48:22 2014 +0000
description:
Set BGRA pixel sequence if __ARMEB__ is defined.
diffstat:
sys/arch/arm/allwinner/awin_debe.c | 11 +++++++++--
sys/arch/arm/allwinner/awin_reg.h | 2 ++
2 files changed, 11 insertions(+), 2 deletions(-)
diffs (44 lines):
diff -r 85e008002c2a -r c44d00cd648f sys/arch/arm/allwinner/awin_debe.c
--- a/sys/arch/arm/allwinner/awin_debe.c Mon Dec 08 07:34:31 2014 +0000
+++ b/sys/arch/arm/allwinner/awin_debe.c Mon Dec 08 10:48:22 2014 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: awin_debe.c,v 1.11 2014/12/04 11:16:38 jmcneill Exp $ */
+/* $NetBSD: awin_debe.c,v 1.12 2014/12/08 10:48:22 jmcneill Exp $ */
/*-
* Copyright (c) 2014 Jared D. McNeill <jmcneill%invisible.ca@localhost>
@@ -37,7 +37,7 @@
#define AWIN_DEBE_CURMAX 64
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: awin_debe.c,v 1.11 2014/12/04 11:16:38 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: awin_debe.c,v 1.12 2014/12/08 10:48:22 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -487,6 +487,13 @@
AWIN_DEBE_ATTCTL1_LAY_FBFMT);
val &= ~AWIN_DEBE_ATTCTL1_LAY_BRSWAPEN;
val &= ~AWIN_DEBE_ATTCTL1_LAY_FBPS;
+#if __ARMEB__
+ val |= __SHIFTIN(AWIN_DEBE_ATTCTL1_LAY_FBPS_32BPP_BGRA,
+ AWIN_DEBE_ATTCTL1_LAY_FBPS);
+#else
+ val |= __SHIFTIN(AWIN_DEBE_ATTCTL1_LAY_FBPS_32BPP_ARGB,
+ AWIN_DEBE_ATTCTL1_LAY_FBPS);
+#endif
DEBE_WRITE(sc, AWIN_DEBE_ATTCTL1_REG, val);
val = DEBE_READ(sc, AWIN_DEBE_MODCTL_REG);
diff -r 85e008002c2a -r c44d00cd648f sys/arch/arm/allwinner/awin_reg.h
--- a/sys/arch/arm/allwinner/awin_reg.h Mon Dec 08 07:34:31 2014 +0000
+++ b/sys/arch/arm/allwinner/awin_reg.h Mon Dec 08 10:48:22 2014 +0000
@@ -1727,6 +1727,8 @@
#define AWIN_DEBE_ATTCTL1_LAY_FBFMT_RGBA4444 13
#define AWIN_DEBE_ATTCTL1_LAY_BRSWAPEN __BIT(2)
#define AWIN_DEBE_ATTCTL1_LAY_FBPS __BITS(1,0)
+#define AWIN_DEBE_ATTCTL1_LAY_FBPS_32BPP_ARGB 0
+#define AWIN_DEBE_ATTCTL1_LAY_FBPS_32BPP_BGRA 2
#define AWIN_DEBE_REGBUFFCTL_REGAUTOLOAD_DIS __BIT(1)
#define AWIN_DEBE_REGBUFFCTL_REGLOADCTL __BIT(0)
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