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[src/trunk]: src/sys/arch/powerpc/booke Revert previous commit.
details: https://anonhg.NetBSD.org/src/rev/13d40e11b597
branches: trunk
changeset: 335006:13d40e11b597
user: nonaka <nonaka%NetBSD.org@localhost>
date: Sat Dec 20 17:55:07 2014 +0000
description:
Revert previous commit.
diffstat:
sys/arch/powerpc/booke/dev/pq3etsec.c | 10 ++++--
sys/arch/powerpc/booke/dev/pq3gpio.c | 47 ++++++++++++++++++++++++++++++++--
sys/arch/powerpc/booke/e500_intr.c | 10 +++---
sys/arch/powerpc/booke/pci/pq3pci.c | 25 +++++++++++++++++-
4 files changed, 78 insertions(+), 14 deletions(-)
diffs (213 lines):
diff -r 47b41d9209ef -r 13d40e11b597 sys/arch/powerpc/booke/dev/pq3etsec.c
--- a/sys/arch/powerpc/booke/dev/pq3etsec.c Sat Dec 20 16:52:21 2014 +0000
+++ b/sys/arch/powerpc/booke/dev/pq3etsec.c Sat Dec 20 17:55:07 2014 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pq3etsec.c,v 1.16 2012/07/22 23:46:10 matt Exp $ */
+/* $NetBSD: pq3etsec.c,v 1.17 2014/12/20 17:55:08 nonaka Exp $ */
/*-
* Copyright (c) 2010, 2011 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -39,7 +39,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pq3etsec.c,v 1.16 2012/07/22 23:46:10 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pq3etsec.c,v 1.17 2014/12/20 17:55:08 nonaka Exp $");
#include <sys/param.h>
#include <sys/cpu.h>
@@ -330,9 +330,11 @@
const uint16_t svr = (mfspr(SPR_SVR) & ~0x80000) >> 16;
const bool p1025_p = (svr == (SVR_P1025v1 >> 16)
|| svr == (SVR_P1016v1 >> 16));
+ const bool p1023_p = (svr == (SVR_P1023v1 >> 16)
+ || svr == (SVR_P1017v1 >> 16));
if (device_is_a(parent, "cpunode")) {
- if (!p1025_p
+ if ((!p1025_p && !p1023_p)
|| !e500_cpunode_submatch(parent, cf, cf->cf_name, aux))
return 0;
@@ -340,7 +342,7 @@
}
if (device_is_a(parent, "tsec")) {
- if (p1025_p
+ if ((p1025_p || p1023_p)
|| !e500_cpunode_submatch(parent, cf, cf->cf_name, aux))
return 0;
diff -r 47b41d9209ef -r 13d40e11b597 sys/arch/powerpc/booke/dev/pq3gpio.c
--- a/sys/arch/powerpc/booke/dev/pq3gpio.c Sat Dec 20 16:52:21 2014 +0000
+++ b/sys/arch/powerpc/booke/dev/pq3gpio.c Sat Dec 20 17:55:07 2014 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pq3gpio.c,v 1.8 2012/07/15 08:44:56 matt Exp $ */
+/* $NetBSD: pq3gpio.c,v 1.9 2014/12/20 17:55:08 nonaka Exp $ */
/*-
* Copyright (c) 2010, 2011 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -41,7 +41,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pq3gpio.c,v 1.8 2012/07/15 08:44:56 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pq3gpio.c,v 1.9 2014/12/20 17:55:08 nonaka Exp $");
#include <sys/param.h>
#include <sys/cpu.h>
@@ -161,7 +161,7 @@
}
#endif
-#if defined(MPC8536) || defined(P2020)
+#if defined(MPC8536) || defined(P2020) || defined(P1023)
/*
* MPC8536 / P20x0 have controllable input/output pins
*/
@@ -379,6 +379,43 @@
}
#endif /* MPC8548 */
+#ifdef P1023
+static void
+pq3gpio_p1023_attach(device_t self, bus_space_tag_t bst,
+ bus_space_handle_t bsh, u_int svr)
+{
+ static const uint32_t gpio2pmuxcr_map[][2] = {
+ { __BIT(8), PMUXCR_SDHC_CD },
+ { __BIT(9), PMUXCR_SDHC_WP },
+ /*
+ * These are really two bits but the low bit MBZ so we ignore
+ * it.
+ */
+ { __BIT(10), PMUXCR_TSEC3_TS },
+ { __BIT(11), PMUXCR_TSEC3_TS },
+ };
+
+ uint32_t pinmask = 0xffff0000; /* assume all bits are valid */
+ size_t pincnt = 16;
+ const uint32_t pmuxcr = cpu_read_4(GLOBAL_BASE + PMUXCR);
+ for (size_t i = 0; i < __arraycount(gpio2pmuxcr_map); i++) {
+ if (pmuxcr & gpio2pmuxcr_map[i][1]) {
+ pinmask &= ~gpio2pmuxcr_map[i][0];
+ pincnt--;
+ }
+ }
+
+ /*
+ * Create GPIO pin groups
+ */
+ aprint_normal_dev(self, "%zu input/output/opendrain pins\n",
+ pincnt);
+ pq3gpio_group_create(self, bst, bsh, GPDAT, pinmask,
+ GPIO_PIN_INPUT|GPIO_PIN_OUTPUT|GPIO_PIN_OPENDRAIN,
+ pq3gpio_pin_ctl);
+}
+#endif /* P1023 */
+
#ifdef P1025
static void
pq3gpio_p1025_attach(device_t self, bus_space_tag_t bst,
@@ -487,6 +524,10 @@
{ SVR_MPC8536v1 >> 16, pq3gpio_mpc8536_attach,
GPIO_BASE, GPIO_SIZE },
#endif
+#ifdef P1023
+ { SVR_P1023v1 >> 16, pq3gpio_p1023_attach,
+ GPIO_BASE, GPIO_SIZE },
+#endif
#ifdef P1025
{ SVR_P1025v1 >> 16, pq3gpio_p1025_attach,
GLOBAL_BASE, GLOBAL_SIZE },
diff -r 47b41d9209ef -r 13d40e11b597 sys/arch/powerpc/booke/e500_intr.c
--- a/sys/arch/powerpc/booke/e500_intr.c Sat Dec 20 16:52:21 2014 +0000
+++ b/sys/arch/powerpc/booke/e500_intr.c Sat Dec 20 17:55:07 2014 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: e500_intr.c,v 1.26 2014/12/19 04:00:35 nonaka Exp $ */
+/* $NetBSD: e500_intr.c,v 1.27 2014/12/20 17:55:07 nonaka Exp $ */
/*-
* Copyright (c) 2010, 2011 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -39,7 +39,7 @@
#define __INTR_PRIVATE
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: e500_intr.c,v 1.26 2014/12/19 04:00:35 nonaka Exp $");
+__KERNEL_RCSID(0, "$NetBSD: e500_intr.c,v 1.27 2014/12/20 17:55:07 nonaka Exp $");
#include <sys/param.h>
#include <sys/proc.h>
@@ -1205,7 +1205,7 @@
atomic_or_32(&dst_ci->ci_pending_ipis, ipimsg);
}
- openpic_write(cpu, OPENPIC_IPIDR(target), dstmask);
+ openpic_write(cpu, OPENPIC_IPIDR(0), dstmask);
}
typedef void (*ipifunc_t)(void);
@@ -1260,8 +1260,8 @@
/*
* Establish the IPI interrupts for this CPU.
*/
- if (e500_intr_cpu_establish(ci, ci->ci_cpuid, IPL_VM, IST_IPI,
- e500_ipi_intr, NULL) == NULL)
+ if (e500_intr_cpu_establish(ci, 0, IPL_VM, IST_IPI, e500_ipi_intr,
+ NULL) == NULL)
panic("%s: failed to establish ipi interrupt!", __func__);
/*
diff -r 47b41d9209ef -r 13d40e11b597 sys/arch/powerpc/booke/pci/pq3pci.c
--- a/sys/arch/powerpc/booke/pci/pq3pci.c Sat Dec 20 16:52:21 2014 +0000
+++ b/sys/arch/powerpc/booke/pci/pq3pci.c Sat Dec 20 17:55:07 2014 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pq3pci.c,v 1.17 2014/07/30 10:50:54 joerg Exp $ */
+/* $NetBSD: pq3pci.c,v 1.18 2014/12/20 17:55:08 nonaka Exp $ */
/*-
* Copyright (c) 2010, 2011 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -44,7 +44,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pq3pci.c,v 1.17 2014/07/30 10:50:54 joerg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pq3pci.c,v 1.18 2014/12/20 17:55:08 nonaka Exp $");
#include <sys/param.h>
#include <sys/device.h>
@@ -92,6 +92,11 @@
__SHIFTIN(field##_##P20x0##_##value, PORDEVSR_##field), result), \
TRUTH_ENCODE(SVR_P1016v1, inst, PORDEVSR_##field, \
__SHIFTIN(field##_##P20x0##_##value, PORDEVSR_##field), result)
+#define PORDEVSR_P1023_TRUTH_ENCODE(inst, field, value, result) \
+ TRUTH_ENCODE(SVR_P1023v1, inst, PORDEVSR_##field, \
+ __SHIFTIN(field##_##P20x0##_##value, PORDEVSR_##field), result), \
+ TRUTH_ENCODE(SVR_P1017v1, inst, PORDEVSR_##field, \
+ __SHIFTIN(field##_##P20x0##_##value, PORDEVSR_##field), result)
#define PORDEVSR_TRUTH_ENCODE(svr, inst, field, value, result) \
TRUTH_ENCODE(svr, inst, PORDEVSR_##field, \
@@ -171,6 +176,22 @@
PORDEVSR_P1025_TRUTH_ENCODE(2, IOSEL, PCIE12_X1_SGMII23, 1),
#endif
+
+#ifdef P1023 /* XXX XXXNONAKA FIXME */
+ PORDEVSR_P1023_TRUTH_ENCODE(1, IOSEL, PCIE1_X1, 1),
+ PORDEVSR_P1023_TRUTH_ENCODE(1, IOSEL, PCIE12_X1_3_X2, 1),
+ PORDEVSR_P1023_TRUTH_ENCODE(1, IOSEL, PCIE13_X2, 2),
+ PORDEVSR_P1023_TRUTH_ENCODE(1, IOSEL, PCIE1_X4, 4),
+ PORDEVSR_P1023_TRUTH_ENCODE(1, IOSEL, PCIE1_X1_SRIO2500_1X, 1),
+ PORDEVSR_P1023_TRUTH_ENCODE(1, IOSEL, PCIE12_X1_SGMII23, 1),
+ PORDEVSR_P1023_TRUTH_ENCODE(1, IOSEL, PCIE1_X2_SGMII23, 2),
+
+ PORDEVSR_P1023_TRUTH_ENCODE(2, IOSEL, PCIE12_X1_3_X2, 1),
+ PORDEVSR_P1023_TRUTH_ENCODE(2, IOSEL, PCIE12_X1_SGMII23, 1),
+
+ PORDEVSR_P1023_TRUTH_ENCODE(3, IOSEL, PCIE12_X1_3_X2, 2),
+ PORDEVSR_P1023_TRUTH_ENCODE(3, IOSEL, PCIE13_X2, 2),
+#endif
};
static const struct e500_truthtab pq3pci_pci_pcix[] = {
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