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[src/trunk]: src/sys/arch read chip ID from SRAM ver reg on A80; the chip ID ...
details: https://anonhg.NetBSD.org/src/rev/e8ed4dd6bd08
branches: trunk
changeset: 335026:e8ed4dd6bd08
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Mon Dec 22 00:07:24 2014 +0000
description:
read chip ID from SRAM ver reg on A80; the chip ID is 0x1639
diffstat:
sys/arch/arm/allwinner/awin_board.c | 21 ++++++++++++++-------
sys/arch/arm/allwinner/awin_io.c | 5 ++---
sys/arch/arm/allwinner/awin_reg.h | 3 ++-
sys/arch/arm/allwinner/awin_var.h | 5 +++--
sys/arch/evbarm/awin/awin_start.S | 12 +++++++++++-
5 files changed, 32 insertions(+), 14 deletions(-)
diffs (169 lines):
diff -r 96d4ce9cafa3 -r e8ed4dd6bd08 sys/arch/arm/allwinner/awin_board.c
--- a/sys/arch/arm/allwinner/awin_board.c Sun Dec 21 23:00:35 2014 +0000
+++ b/sys/arch/arm/allwinner/awin_board.c Mon Dec 22 00:07:24 2014 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: awin_board.c,v 1.33 2014/12/07 18:32:13 jmcneill Exp $ */
+/* $NetBSD: awin_board.c,v 1.34 2014/12/22 00:07:24 jmcneill Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -36,7 +36,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: awin_board.c,v 1.33 2014/12/07 18:32:13 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: awin_board.c,v 1.34 2014/12/22 00:07:24 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -59,6 +59,7 @@
bus_space_handle_t awin_core_bsh;
#if defined(ALLWINNER_A80)
+bus_space_handle_t awin_core2_bsh;
bus_space_handle_t awin_rcpus_bsh;
#endif
@@ -194,6 +195,11 @@
KASSERT(awin_core_bsh == iobase);
#ifdef ALLWINNER_A80
+ error = bus_space_map(&awin_bs_tag, AWIN_A80_CORE2_PBASE,
+ AWIN_A80_CORE2_SIZE, 0, &awin_core2_bsh);
+ if (error)
+ panic("%s: failed to map awin %s registers: %d",
+ __func__, "core2", error);
error = bus_space_map(&awin_bs_tag, AWIN_A80_RCPUS_PBASE,
AWIN_A80_RCPUS_SIZE, 0, &awin_rcpus_bsh);
if (error)
@@ -301,25 +307,26 @@
awin_chip_id(void)
{
#if defined(ALLWINNER_A80)
- return AWIN_CHIP_ID_A80;
+ bus_space_handle_t bsh = awin_core2_bsh;
#else
+ bus_space_handle_t bsh = awin_core_bsh;
+#endif
static uint16_t chip_id = 0;
uint32_t ver;
if (!chip_id) {
- ver = bus_space_read_4(&awin_bs_tag, awin_core_bsh,
+ ver = bus_space_read_4(&awin_bs_tag, bsh,
AWIN_SRAM_OFFSET + AWIN_SRAM_VER_REG);
ver |= AWIN_SRAM_VER_R_EN;
- bus_space_write_4(&awin_bs_tag, awin_core_bsh,
+ bus_space_write_4(&awin_bs_tag, bsh,
AWIN_SRAM_OFFSET + AWIN_SRAM_VER_REG, ver);
- ver = bus_space_read_4(&awin_bs_tag, awin_core_bsh,
+ ver = bus_space_read_4(&awin_bs_tag, bsh,
AWIN_SRAM_OFFSET + AWIN_SRAM_VER_REG);
chip_id = __SHIFTOUT(ver, AWIN_SRAM_VER_KEY_FIELD);
}
return chip_id;
-#endif
}
const char *
diff -r 96d4ce9cafa3 -r e8ed4dd6bd08 sys/arch/arm/allwinner/awin_io.c
--- a/sys/arch/arm/allwinner/awin_io.c Sun Dec 21 23:00:35 2014 +0000
+++ b/sys/arch/arm/allwinner/awin_io.c Mon Dec 22 00:07:24 2014 +0000
@@ -31,7 +31,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: awin_io.c,v 1.40 2014/12/21 17:40:17 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: awin_io.c,v 1.41 2014/12/22 00:07:24 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -228,13 +228,12 @@
switch (awin_chip_id()) {
#ifdef ALLWINNER_A80
case AWIN_CHIP_ID_A80:
+ sc->sc_a80_core2_bsh = awin_core2_bsh;
sc->sc_a80_rcpus_bsh = awin_rcpus_bsh;
bus_space_subregion(sc->sc_bst, sc->sc_bsh,
AWIN_A80_CCU_SCLK_OFFSET, 0x1000, &sc->sc_ccm_bsh);
bus_space_map(sc->sc_bst, AWIN_A80_USB_PBASE,
AWIN_A80_USB_SIZE, 0, &sc->sc_a80_usb_bsh);
- bus_space_map(sc->sc_bst, AWIN_A80_CORE2_PBASE,
- AWIN_A80_CORE2_SIZE, 0, &sc->sc_a80_core2_bsh);
break;
#endif
default:
diff -r 96d4ce9cafa3 -r e8ed4dd6bd08 sys/arch/arm/allwinner/awin_reg.h
--- a/sys/arch/arm/allwinner/awin_reg.h Sun Dec 21 23:00:35 2014 +0000
+++ b/sys/arch/arm/allwinner/awin_reg.h Mon Dec 22 00:07:24 2014 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: awin_reg.h,v 1.75 2014/12/21 17:37:40 jmcneill Exp $ */
+/* $NetBSD: awin_reg.h,v 1.76 2014/12/22 00:07:24 jmcneill Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
@@ -185,6 +185,7 @@
#define AWIN_SRAM_VER_KEY_A10 0x1623
#define AWIN_SRAM_VER_KEY_A13 0x1625
#define AWIN_SRAM_VER_KEY_A31 0x1633
+#define AWIN_SRAM_VER_KEY_A80 0x1639
#define AWIN_SRAM_VER_KEY_A23 0x1650
#define AWIN_SRAM_VER_KEY_A20 0x1651
diff -r 96d4ce9cafa3 -r e8ed4dd6bd08 sys/arch/arm/allwinner/awin_var.h
--- a/sys/arch/arm/allwinner/awin_var.h Sun Dec 21 23:00:35 2014 +0000
+++ b/sys/arch/arm/allwinner/awin_var.h Mon Dec 22 00:07:24 2014 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: awin_var.h,v 1.33 2014/12/07 18:32:13 jmcneill Exp $ */
+/* $NetBSD: awin_var.h,v 1.34 2014/12/22 00:07:24 jmcneill Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -94,6 +94,7 @@
extern struct bus_space awin_a4x_bs_tag;
extern bus_space_handle_t awin_core_bsh;
#if defined(ALLWINNER_A80)
+extern bus_space_handle_t awin_core2_bsh;
extern bus_space_handle_t awin_rcpus_bsh;
#endif
extern struct arm32_bus_dma_tag awin_dma_tag;
@@ -117,7 +118,7 @@
#define AWIN_CHIP_ID_A31 AWIN_SRAM_VER_KEY_A31
#define AWIN_CHIP_ID_A23 AWIN_SRAM_VER_KEY_A23
#define AWIN_CHIP_ID_A20 AWIN_SRAM_VER_KEY_A20
-#define AWIN_CHIP_ID_A80 0xff80 /* fake; no chip ID register */
+#define AWIN_CHIP_ID_A80 AWIN_SRAM_VER_KEY_A80
uint16_t awin_chip_id(void);
const char *awin_chip_name(void);
diff -r 96d4ce9cafa3 -r e8ed4dd6bd08 sys/arch/evbarm/awin/awin_start.S
--- a/sys/arch/evbarm/awin/awin_start.S Sun Dec 21 23:00:35 2014 +0000
+++ b/sys/arch/evbarm/awin/awin_start.S Mon Dec 22 00:07:24 2014 +0000
@@ -41,7 +41,7 @@
#include <arm/allwinner/awin_reg.h>
#include <evbarm/awin/platform.h>
-RCSID("$NetBSD: awin_start.S,v 1.8 2014/12/11 23:35:11 jmcneill Exp $")
+RCSID("$NetBSD: awin_start.S,v 1.9 2014/12/22 00:07:24 jmcneill Exp $")
#if defined(VERBOSE_INIT_ARM)
#define XPUTC(n) mov r0, n; bl xputc
@@ -590,6 +590,16 @@
L1_S_PROTO_armv7 | L1_S_APv7_KRW | L1_S_V6_XN)
#if defined(ALLWINNER_A80)
+ /* Map AWIN CORE2 */
+ MMU_INIT(AWIN_A80_CORE2_VBASE, AWIN_A80_CORE2_PBASE,
+ (AWIN_A80_CORE2_SIZE + L1_S_SIZE - 1) / L1_S_SIZE,
+ L1_S_PROTO_armv7 | L1_S_APv7_KRW | L1_S_V6_XN)
+
+ /* Map AWIN CORE2 */
+ MMU_INIT(AWIN_A80_CORE2_PBASE, AWIN_A80_CORE2_PBASE,
+ (AWIN_A80_CORE2_SIZE + L1_S_SIZE - 1) / L1_S_SIZE,
+ L1_S_PROTO_armv7 | L1_S_APv7_KRW | L1_S_V6_XN)
+
/* Map AWIN RCPUS (for PIO L-N, PRCM) */
MMU_INIT(AWIN_A80_RCPUS_VBASE, AWIN_A80_RCPUS_PBASE,
(AWIN_A80_RCPUS_SIZE + L1_S_SIZE - 1) / L1_S_SIZE,
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