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[src/trunk]: src/sys/arch/evbarm/awin fix A20/A31 MP
details: https://anonhg.NetBSD.org/src/rev/e90f7fb7dda9
branches: trunk
changeset: 335041:e90f7fb7dda9
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Mon Dec 22 23:46:50 2014 +0000
description:
fix A20/A31 MP
diffstat:
sys/arch/evbarm/awin/awin_start.S | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diffs (21 lines):
diff -r 21b8fbb3fb7b -r e90f7fb7dda9 sys/arch/evbarm/awin/awin_start.S
--- a/sys/arch/evbarm/awin/awin_start.S Mon Dec 22 21:20:11 2014 +0000
+++ b/sys/arch/evbarm/awin/awin_start.S Mon Dec 22 23:46:50 2014 +0000
@@ -41,7 +41,7 @@
#include <arm/allwinner/awin_reg.h>
#include <evbarm/awin/platform.h>
-RCSID("$NetBSD: awin_start.S,v 1.9 2014/12/22 00:07:24 jmcneill Exp $")
+RCSID("$NetBSD: awin_start.S,v 1.10 2014/12/22 23:46:50 jmcneill Exp $")
#if defined(VERBOSE_INIT_ARM)
#define XPUTC(n) mov r0, n; bl xputc
@@ -151,7 +151,7 @@
// Make sure the cache is flushed out to RAM for the other CPUs
bl _C_LABEL(armv7_dcache_wbinv_all)
-#if defined(ALLWINNER_A20) + defined(ALLWINNER_A31) > 1
+#if defined(ALLWINNER_A20) || defined(ALLWINNER_A31)
// Read SoC ID
movw r5, #:lower16:(AWIN_CORE_PBASE+AWIN_SRAM_OFFSET)
movt r5, #:upper16:(AWIN_CORE_PBASE+AWIN_SRAM_OFFSET)
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