[src/trunk]: src/sys/arch/mips deal with Ingenic XBurst CPUs

[macallan <macallan%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/dd12c1c31e28
branches:  trunk
changeset: 333930:dd12c1c31e28
user:      macallan <macallan%NetBSD.org@localhost>
date:      Sat Nov 22 15:02:39 2014 +0000

description:
deal with Ingenic XBurst CPUs

diffstat:

 sys/arch/mips/include/cpuregs.h   |   7 ++++++-
 sys/arch/mips/include/locore.h    |   3 ++-
 sys/arch/mips/mips/mips_machdep.c |  19 +++++++++++++++----
 3 files changed, 23 insertions(+), 6 deletions(-)

diffs (92 lines):

diff -r acc3175d12fc -r dd12c1c31e28 sys/arch/mips/include/cpuregs.h
--- a/sys/arch/mips/include/cpuregs.h   Sat Nov 22 15:00:05 2014 +0000
+++ b/sys/arch/mips/include/cpuregs.h   Sat Nov 22 15:02:39 2014 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpuregs.h,v 1.88 2011/10/29 18:56:49 jakllsch Exp $    */
+/*     $NetBSD: cpuregs.h,v 1.89 2014/11/22 15:02:39 macallan Exp $    */
 
 /*
  * Copyright (c) 2009 Miodrag Vallat.
@@ -973,6 +973,11 @@
 #define        MIPS_eMIPS      0x04    /* MSR's eMIPS */
 
 /*
+ * CPU processor revision IDs for company ID == e1 (Ingenic)
+ */
+#define        MIPS_XBURST     0x02    /* Ingenic XBurst */
+
+/*
  * FPU processor revision ID
  */
 #define        MIPS_SOFT       0x00    /* Software emulation           ISA I   */
diff -r acc3175d12fc -r dd12c1c31e28 sys/arch/mips/include/locore.h
--- a/sys/arch/mips/include/locore.h    Sat Nov 22 15:00:05 2014 +0000
+++ b/sys/arch/mips/include/locore.h    Sat Nov 22 15:02:39 2014 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.h,v 1.93 2012/02/19 21:06:16 rmind Exp $ */
+/* $NetBSD: locore.h,v 1.94 2014/11/22 15:02:39 macallan Exp $ */
 
 /*
  * This file should not be included by MI code!!!
@@ -421,6 +421,7 @@
                                /*      0x0a    unannounced */
 #define     MIPS_PRID_CID_LEXRA                0x0b    /* Lexra */
 #define     MIPS_PRID_CID_RMI          0x0c    /* RMI / NetLogic */
+#define     MIPS_PRID_CID_INGENIC      0xe1
 #define MIPS_PRID_COPTS(x)     (((x) >> 24) & 0x00ff)  /* Company Options */
 
 #ifdef _KERNEL
diff -r acc3175d12fc -r dd12c1c31e28 sys/arch/mips/mips/mips_machdep.c
--- a/sys/arch/mips/mips/mips_machdep.c Sat Nov 22 15:00:05 2014 +0000
+++ b/sys/arch/mips/mips/mips_machdep.c Sat Nov 22 15:02:39 2014 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: mips_machdep.c,v 1.260 2014/06/02 04:57:02 mrg Exp $   */
+/*     $NetBSD: mips_machdep.c,v 1.261 2014/11/22 15:02:39 macallan Exp $      */
 
 /*
  * Copyright 2002 Wasabi Systems, Inc.
@@ -111,7 +111,7 @@
  */
 
 #include <sys/cdefs.h>                 /* RCS ID & Copyright macro defns */
-__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.260 2014/06/02 04:57:02 mrg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.261 2014/11/22 15:02:39 macallan Exp $");
 
 #define __INTR_PRIVATE
 #include "opt_cputype.h"
@@ -175,7 +175,12 @@
 #define        _MTC0_V0_USERLOCAL      _MKINSN(OP_COP0, OP_DMT, _R_V0, MIPS_COP_0_TLB_CONTEXT, 2)
 #else
 #define        _LOAD_V0_L_PRIVATE_A0   _MKINSN(OP_LW, _R_A0, _R_V0, 0, offsetof(lwp_t, l_private))
-#define        _MTC0_V0_USERLOCAL      _MKINSN(OP_COP0, OP_MT, _R_V0, MIPS_COP_0_TLB_CONTEXT, 2)
+/*
+ * XXX
+ * the asm code in mipsX_subr.S uses ,4 - the definition above probably needs
+ * the same fix
+ */
+#define        _MTC0_V0_USERLOCAL      _MKINSN(OP_COP0, OP_MT, _R_V0, MIPS_COP_0_TLB_CONTEXT, 4)
 #endif
 #define        JR_RA                   _MKINSN(OP_SPECIAL, _R_RA, 0, 0, OP_JR)
 
@@ -628,6 +633,10 @@
        { MIPS_PRID_CID_MICROSOFT, MIPS_eMIPS, 1, -1, CPU_ARCH_MIPS1, 64,
          CPU_MIPS_NO_WAIT, 0, 0,               "eMIPS CPU"             },
 
+       /* Ingenic XBurst */
+       { MIPS_PRID_CID_INGENIC, MIPS_XBURST,  -1, -1,  -1, 0,
+         MIPS32_FLAGS | CPU_MIPS_DOUBLE_COUNT, 0, 0, "XBurst"          },
+
        { 0, 0, 0,                              0, 0, 0,
          0, 0, 0,                              NULL                    }
 };
@@ -1417,7 +1426,9 @@
        if (opts->mips_cpu->cpu_cid != 0) {
                if (opts->mips_cpu->cpu_cid <= ncidnames)
                        aprint_normal("%s ", cidnames[opts->mips_cpu->cpu_cid]);
-               else {
+               else if (opts->mips_cpu->cpu_cid == MIPS_PRID_CID_INGENIC) {
+                       aprint_normal("Ingenic ");
+               } else {
                        aprint_normal("Unknown Company ID - 0x%x", opts->mips_cpu->cpu_cid);
                        aprint_normal_dev(dev, "");
                }